diff --git a/realm/include/realm_tests.h b/realm/include/realm_tests.h
index 13a063a..61d4493 100644
--- a/realm/include/realm_tests.h
+++ b/realm/include/realm_tests.h
@@ -16,6 +16,7 @@
 bool test_realm_sve_read_id_registers(void);
 bool test_realm_sve_probe_vl(void);
 bool test_realm_sve_ops(void);
+bool test_realm_sve_fill_regs(void);
 
 #endif /* REALM_TESTS_H */
 
diff --git a/realm/realm_payload_main.c b/realm/realm_payload_main.c
index b13e0a1..f0ab087 100644
--- a/realm/realm_payload_main.c
+++ b/realm/realm_payload_main.c
@@ -105,6 +105,9 @@
 		case REALM_SVE_OPS:
 			test_succeed = test_realm_sve_ops();
 			break;
+		case REALM_SVE_FILL_REGS:
+			test_succeed = test_realm_sve_fill_regs();
+			break;
 		default:
 			realm_printf("%s() invalid cmd %u\n", __func__, cmd);
 			break;
diff --git a/realm/realm_sve.c b/realm/realm_sve.c
index ed6c7c7..d5ef8c1 100644
--- a/realm/realm_sve.c
+++ b/realm/realm_sve.c
@@ -20,6 +20,8 @@
 static int rl_sve_op_1[RL_SVE_OP_ARRAYSIZE];
 static int rl_sve_op_2[RL_SVE_OP_ARRAYSIZE];
 
+static sve_vector_t rl_sve_vectors_write[SVE_NUM_VECTORS] __aligned(16);
+
 /* Returns the maximum supported VL. This test is called only by sve Realm */
 bool test_realm_sve_rdvl(void)
 {
@@ -109,3 +111,20 @@
 
 	return true;
 }
+
+/* Fill SVE Z registers with known pattern */
+bool test_realm_sve_fill_regs(void)
+{
+	uint32_t vl;
+
+	assert(is_armv8_2_sve_present());
+
+	/* Config Realm with max SVE length */
+	sve_config_vq(SVE_VQ_ARCH_MAX);
+	vl = sve_vector_length_get();
+
+	memset((void *)&rl_sve_vectors_write, 0xcd, vl * SVE_NUM_VECTORS);
+	sve_fill_vector_regs(rl_sve_vectors_write);
+
+	return true;
+}