| commit | 9af4d275ed83d1ff81b29b85267babca70484972 | [log] [tgz] |
|---|---|---|
| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | Wed Jun 22 17:23:42 2022 -0500 |
| committer | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | Thu Sep 29 16:56:16 2022 -0500 |
| tree | 8a0a7cc20d714da5ae2dc094807209ccc6dc16fe | |
| parent | e9c9093bae2328f16d0d35c1f2d16212a07ab29f [diff] |
feat(interrupts): resume interrupted target vCPU An SP could be interrupted by a NS interrupt whilst handling a direct message request from another SP. The target SP could send a managed exit response, if supported. Consequently, the sender of the direct message request resumes the target SP by allocating CPU cycles using dummy direct message request. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I697aeb189da12850af9a1db4c3e3e550b5b36541