fix(sme): use rdsvl instead of rdvl

Use rdsvl instruction to get Streaming SVE vector length instead of rdvl
instruction. When the CPU is in Streaming SVE mode both rdvl and rdsvl
instruction returns the same value but that is not true when the CPU is
in Normal SVE mode. So it's preferred to use rdsvl to get SVL.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ieb6226f4fc275ee8a81eb359af465c26e307bc75
diff --git a/include/lib/extensions/sme.h b/include/lib/extensions/sme.h
index b20a8c0..99372e4 100644
--- a/include/lib/extensions/sme.h
+++ b/include/lib/extensions/sme.h
@@ -28,7 +28,7 @@
 void sme_smstop(smestop_instruction_type_t smstop_type);
 
 /* Assembly function prototypes. */
-uint64_t sme_rdvl_1(void);
+uint64_t sme_rdsvl_1(void);
 void sme_try_illegal_instruction(void);
 void sme_vector_to_ZA(const uint64_t *input_vector);
 void sme_ZA_to_vector(const uint64_t *output_vector);
diff --git a/lib/extensions/sme/aarch64/sme_helpers.S b/lib/extensions/sme/aarch64/sme_helpers.S
index c440f09..af6c1b3 100644
--- a/lib/extensions/sme/aarch64/sme_helpers.S
+++ b/lib/extensions/sme/aarch64/sme_helpers.S
@@ -9,7 +9,7 @@
 #include <assert_macros.S>
 
 	.arch	armv8-a+sve
-	.globl	sme_rdvl_1
+	.globl	sme_rdsvl_1
 	.globl	sme_try_illegal_instruction
 	.globl  sme_vector_to_ZA
 	.globl  sme_ZA_to_vector
@@ -56,14 +56,28 @@
 .endm
 
 /*
- * uint64_t sme_rdvl_1(void);
+ * RDSVL - Read multiple of Streaming SVE vector register size to scalar register
+ * RDSVL <Xd>, #<imm>
  *
- * Run rdvl instruction with imm #1.
+ * Arguments/Opcode bit field:
+ * Xd	: 64-bit name of the general-purpose base register.
+ * imm	: signed immediate operand (imm6)
  */
-func sme_rdvl_1
-	rdvl	x0, #1
+.macro _sme_rdsvl xd, imm
+	.inst	0x04bf5800			\
+		| (((\imm) & 0x3f) << 5)	\
+		| (\xd)
+.endm
+
+/*
+ * uint64_t sme_rdsvl_1(void);
+ *
+ * Run rdsvl instruction with imm #1.
+ */
+func sme_rdsvl_1
+	_sme_rdsvl	0, 1
 	ret
-endfunc sme_rdvl_1
+endfunc sme_rdsvl_1
 
 /*
  * void sme_try_illegal_instruction(void);
diff --git a/tftf/tests/extensions/sme/test_sme.c b/tftf/tests/extensions/sme/test_sme.c
index 6d85183..43cd8b0 100644
--- a/tftf/tests/extensions/sme/test_sme.c
+++ b/tftf/tests/extensions/sme/test_sme.c
@@ -113,7 +113,7 @@
 		isb();
 
 		/* Compute current and requested vector lengths in bits. */
-		current_vector_len = ((unsigned int)sme_rdvl_1() * 8U);
+		current_vector_len = ((unsigned int)sme_rdsvl_1() * 8U);
 		requested_vector_len = (i+1U)*128U;
 
 		/*