feat(spe): add support for more SPE versions
From Armv8.8, more SPE versions are supported, such as FEAT_SPEv1p3
and FEAT_SPEv1p4. Included these versions in the test case.
Also, moved enum and function to appropriate header.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I5d2999068e619aa5fdad104bbe0177dcedcd0d8c
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index e436e6b..d0607f1 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -152,9 +152,15 @@
#define ID_AA64PFR0_FEAT_RME_V1 U(1)
/* ID_AA64DFR0_EL1.PMS definitions (for ARMv8.2+) */
-#define ID_AA64DFR0_PMS_SHIFT U(32)
-#define ID_AA64DFR0_PMS_LENGTH U(4)
-#define ID_AA64DFR0_PMS_MASK ULL(0xf)
+#define ID_AA64DFR0_PMS_SHIFT U(32)
+#define ID_AA64DFR0_PMS_LENGTH U(4)
+#define ID_AA64DFR0_PMS_MASK ULL(0xf)
+#define ID_AA64DFR0_SPE_NOT_SUPPORTED U(0)
+#define ID_AA64DFR0_SPE U(1)
+#define ID_AA64DFR0_SPE_V1P1 U(2)
+#define ID_AA64DFR0_SPE_V1P2 U(3)
+#define ID_AA64DFR0_SPE_V1P3 U(4)
+#define ID_AA64DFR0_SPE_V1P4 U(5)
/* ID_AA64DFR0_EL1.DEBUG definitions */
#define ID_AA64DFR0_DEBUG_SHIFT U(0)
diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h
index 761a42e..705d98f 100644
--- a/include/lib/aarch64/arch_features.h
+++ b/include/lib/aarch64/arch_features.h
@@ -198,4 +198,10 @@
== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
}
+static inline unsigned int spe_get_version(void)
+{
+ return (unsigned int)((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) &
+ ID_AA64DFR0_PMS_MASK);
+}
+
#endif /* ARCH_FEATURES_H */
diff --git a/tftf/tests/extensions/spe/test_spe.c b/tftf/tests/extensions/spe/test_spe.c
index 8b18654..d0d89ef 100644
--- a/tftf/tests/extensions/spe/test_spe.c
+++ b/tftf/tests/extensions/spe/test_spe.c
@@ -6,39 +6,15 @@
#include <test_helpers.h>
-#ifdef __aarch64__
-/*
- * Get SPE version value from id_aa64dfr0_el1.
- * Return values
- * ID_AA64DFR0_SPE_NOT_SUPPORTED: not supported
- * ID_AA64DFR0_SPE: FEAT_SPE supported (introduced in ARM v8.2)
- * ID_AA64DFR0_SPE_V1P1: FEAT_SPEv1p1 supported (introduced in ARM v8.5)
- * ID_AA64DFR0_SPE_V1P2: FEAT_SPEv1p2 supported (introduced in ARM v8.7)
- */
-
-typedef enum {
- ID_AA64DFR0_SPE_NOT_SUPPORTED = 0,
- ID_AA64DFR0_SPE,
- ID_AA64DFR0_SPE_V1P1,
- ID_AA64DFR0_SPE_V1P2
-} spe_ver_t;
-
-static spe_ver_t spe_get_version(void)
-{
- return (spe_ver_t)((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) &
- ID_AA64DFR0_PMS_MASK);
-}
-#endif /* __aarch64__ */
-
test_result_t test_spe_support(void)
{
/* SPE is an AArch64-only feature.*/
SKIP_TEST_IF_AARCH32();
#ifdef __aarch64__
- spe_ver_t spe_ver = spe_get_version();
+ unsigned int spe_ver = spe_get_version();
- assert(spe_ver <= ID_AA64DFR0_SPE_V1P2);
+ assert(spe_ver <= ID_AA64DFR0_SPE_V1P4);
if (spe_ver == ID_AA64DFR0_SPE_NOT_SUPPORTED) {
return TEST_RESULT_SKIPPED;