feat(smc): add SMCCCv1.3 sve hint bit support in tftf framework
TFTF smc library uses SVE field in trap register to represent SVE
hint flag.
Testcase has to explicitly set this bit using the helper routine
tftf_smc_set_sve_hint(). When set to true, denotes absence of SVE
specific live state on the CPU that implements SVE. Once set to true,
SVE will be disabled in trap register and any SMC made using tftf_smc()
will set FUNCID_SVE_HINT in the SMC function ID.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I13055fe4102cc4e35af1d7091e88327a21778835
diff --git a/include/lib/tftf_lib.h b/include/lib/tftf_lib.h
index d265bb9..8eff7fc 100644
--- a/include/lib/tftf_lib.h
+++ b/include/lib/tftf_lib.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -159,6 +159,21 @@
*/
smc_ret_values tftf_smc(const smc_args *args);
+/* Assembler routine to trigger a SMC call. */
+smc_ret_values asm_tftf_smc64(uint32_t fid, u_register_t arg1, u_register_t arg2,
+ u_register_t arg3, u_register_t arg4,
+ u_register_t arg5, u_register_t arg6,
+ u_register_t arg7);
+
+/*
+ * Update the SVE hint for the current CPU. Any SMC call made through tftf_smc
+ * will update the SVE hint bit in the SMC Function ID.
+ */
+void tftf_smc_set_sve_hint(bool sve_hint_flag);
+
+/* Return the SVE hint bit value for the current CPU */
+bool tftf_smc_get_sve_hint(void);
+
/*
* Trigger an HVC call.
*/