commit 3f6e1ec4d09d2a4b3999eab24e1a0f3baf97e7bb
author Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Mon May 24 14:49:24 2021 +0100
committer Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Mon Jun 21 12:25:44 2021 +0100
tree ab841d9d9d64e87659471107b36aa03c2dc12db4
parent e3cfd6df27e46c17f514baab275f0a6209aecb44

plat: tc0: Update GICR base address

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I336a815a722dfa387d5d9720ea9f22fedac55bbf

plat/arm/tc0/include/platform_def.h

diff --git a/plat/arm/tc0/include/platform_def.h b/plat/arm/tc0/include/platform_def.h
index acdf370..def4154 100644
--- a/plat/arm/tc0/include/platform_def.h
+++ b/plat/arm/tc0/include/platform_def.h
@@ -72,7 +72,7 @@
 
 /* GIC-600 & interrupt handling related constants */
 #define TC0_GICD_BASE			0x30000000
-#define TC0_GICR_BASE			0x30140000
+#define TC0_GICR_BASE			0x30080000
 #define TC0_GICC_BASE			0x2C000000
 
 /* SoC's PL011 UART0 related constants */