Trusted Firmware-A Tests, version 2.0

This is the first public version of the tests for the Trusted
Firmware-A project. Please see the documentation provided in the
source tree for more details.

Change-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Co-authored-by: amobal01 <amol.balasokamble@arm.com>
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Co-authored-by: Asha R <asha.r@arm.com>
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Co-authored-by: David Cunado <david.cunado@arm.com>
Co-authored-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Co-authored-by: dp-arm <dimitris.papastamos@arm.com>
Co-authored-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Co-authored-by: Jonathan Wright <jonathan.wright@arm.com>
Co-authored-by: Kévin Petit <kevin.petit@arm.com>
Co-authored-by: Roberto Vargas <roberto.vargas@arm.com>
Co-authored-by: Sathees Balya <sathees.balya@arm.com>
Co-authored-by: Shawon Roy <Shawon.Roy@arm.com>
Co-authored-by: Soby Mathew <soby.mathew@arm.com>
Co-authored-by: Thomas Abraham <thomas.abraham@arm.com>
Co-authored-by: Vikram Kanigiri <vikram.kanigiri@arm.com>
Co-authored-by: Yatharth Kochar <yatharth.kochar@arm.com>
diff --git a/lib/smc/aarch32/asm_smc.S b/lib/smc/aarch32/asm_smc.S
new file mode 100644
index 0000000..908b8d0
--- /dev/null
+++ b/lib/smc/aarch32/asm_smc.S
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016-2017, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <asm_macros.S>
+
+	.globl	asm_tftf_smc32
+
+/* ---------------------------------------------------------------------------
+ * void asm_tftf_smc32(const smc_args *args,
+ *                                smc_ret_values *smc_ret);
+ * ---------------------------------------------------------------------------
+ */
+func asm_tftf_smc32
+	/* Push r9 to keep the stack pointer aligned to 64 bit. */
+	push	{r4 - r9}
+
+	/* Store the `smc_ret` pointer in a callee saved register */
+	mov	r8, r1
+
+	/* Load values used as arguments for the SMC. */
+	ldm	r0, {r0 - r7}
+
+	smc	#0
+
+	/*
+	 * The returned values from the SMC are in r0-r3, put them in the
+	 * 'smc_ret_values' return structure.
+	 */
+	stm	r8, {r0 - r3}
+
+	pop	{r4 - r9}
+	bx	lr
+endfunc asm_tftf_smc32
diff --git a/lib/smc/aarch32/smc.c b/lib/smc/aarch32/smc.c
new file mode 100644
index 0000000..dc3d83f
--- /dev/null
+++ b/lib/smc/aarch32/smc.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2018, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdint.h>
+#include <tftf.h>
+
+void asm_tftf_smc32(const smc_args *args,
+		smc_ret_values *smc_ret);
+
+smc_ret_values tftf_smc(const smc_args *args)
+{
+	smc_ret_values ret = {0};
+	asm_tftf_smc32(args, &ret);
+
+	return ret;
+}
diff --git a/lib/smc/aarch64/asm_smc.S b/lib/smc/aarch64/asm_smc.S
new file mode 100644
index 0000000..2b305b9
--- /dev/null
+++ b/lib/smc/aarch64/asm_smc.S
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2013-2017, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <asm_macros.S>
+
+	.globl	asm_tftf_smc64
+
+	.section        .text, "ax"
+
+
+/* ---------------------------------------------------------------------------
+ * smc_ret_values asm_tftf_smc64(uint64_t arg0,
+ *					      uint64_t arg1,
+ *					      uint64_t arg2,
+ *					      uint64_t arg3,
+ *					      uint64_t arg4,
+ *					      uint64_t arg5,
+ *					      uint64_t arg6,
+ *					      uint64_t arg7);
+ * ---------------------------------------------------------------------------
+ */
+func asm_tftf_smc64
+	/*
+	 * According to the AAPCS64, x8 is the indirect result location
+	 * register. It contains the address of the memory block that the caller
+	 * has reserved to hold the result, i.e. the smc_ret_values structure
+	 * in our case.
+	 * x8 might be clobbered across the SMC call so save it on the stack.
+	 * Although x8 contains an 8 byte value, we are allocating 16bytes on the stack
+	 * to respect 16byte stack-alignment.
+	 */
+	str	x8, [sp, #-16]!
+
+	/* SMC arguments are already stored in x0-x6 */
+	smc	#0
+
+	/* Pop x8 into a caller-saved register */
+	ldr	x9, [sp], #16
+
+	/*
+	 * Return values are stored in x0-x3, put them in the 'smc_ret_values'
+	 * return structure
+	 */
+	stp	x0, x1, [x9, #0]
+	stp	x2, x3, [x9, #16]
+	ret
+endfunc asm_tftf_smc64
diff --git a/lib/smc/aarch64/smc.c b/lib/smc/aarch64/smc.c
new file mode 100644
index 0000000..06b841c
--- /dev/null
+++ b/lib/smc/aarch64/smc.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2018, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdint.h>
+#include <tftf.h>
+
+smc_ret_values asm_tftf_smc64(u_register_t arg0,
+					u_register_t arg1,
+					u_register_t arg2,
+					u_register_t arg3,
+					u_register_t arg4,
+					u_register_t arg5,
+					u_register_t arg6,
+					u_register_t arg7);
+
+smc_ret_values tftf_smc(const smc_args *args)
+{
+	return asm_tftf_smc64(args->arg0,
+			      args->arg1,
+			      args->arg2,
+			      args->arg3,
+			      args->arg4,
+			      args->arg5,
+			      args->arg6,
+			      args->arg7);
+}