refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
Currently, there are several reference to "SGI" or "sgi" in comments or
as macro prefix within the neoverse_rd directory. As part of the
migration to neoverse_rd, rename all occurences of "SGI/sgi" to
"Neoverse-RD" or the "NRD" prefix accordingly. All references in
comments are rephrased as "Neoverse RD platforms". References in code
are renamed as "NRD"/"nrd" accordingly.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: I55bdab01051974b3ddb2dae3bc4c0e253fb85fc3
diff --git a/plat/arm/neoverse_rd/common/arch/aarch64/plat_helpers.S b/plat/arm/neoverse_rd/common/arch/aarch64/plat_helpers.S
index 9e1aa0f..122d0b9 100644
--- a/plat/arm/neoverse_rd/common/arch/aarch64/plat_helpers.S
+++ b/plat/arm/neoverse_rd/common/arch/aarch64/plat_helpers.S
@@ -16,7 +16,7 @@
/*----------------------------------------------------------------------
* unsigned int platform_get_core_pos(unsigned long mpid)
*
- * Function to calculate the core position on sgi platforms.
+ * Function to calculate the core position on Neoverse RD platforms.
*
* (ClusterId * NRD_MAX_CPUS_PER_CLUSTER * NRD_MAX_PE_PER_CPU) +
* (CPUId * NRD_MAX_PE_PER_CPU) +
diff --git a/plat/arm/neoverse_rd/common/include/nrd_base_platform_def.h b/plat/arm/neoverse_rd/common/include/nrd_base_platform_def.h
index 09686a4..6a7e487 100644
--- a/plat/arm/neoverse_rd/common/include/nrd_base_platform_def.h
+++ b/plat/arm/neoverse_rd/common/include/nrd_base_platform_def.h
@@ -14,19 +14,19 @@
#define PLATFORM_LINKER_ARCH aarch64
/* Sub-system Peripherals */
-#define SGI_DEVICE0_BASE UL(0x2A000000)
-#define SGI_DEVICE0_SIZE UL(0x26000000)
+#define NRD_DEVICE0_BASE UL(0x2A000000)
+#define NRD_DEVICE0_SIZE UL(0x26000000)
/* Peripherals and PCIe expansion area */
-#define SGI_DEVICE1_BASE UL(0x60000000)
-#define SGI_DEVICE1_SIZE UL(0x20000000)
+#define NRD_DEVICE1_BASE UL(0x60000000)
+#define NRD_DEVICE1_SIZE UL(0x20000000)
/* AP Non-Secure UART related constants */
-#define SGI_CSS_NSEC_UART_BASE UL(0x2A400000)
-#define SGI_CSS_NSEC_CLK_IN_HZ 7372800
+#define NRD_CSS_NSEC_UART_BASE UL(0x2A400000)
+#define NRD_CSS_NSEC_CLK_IN_HZ 7372800
-#define PLAT_ARM_UART_BASE SGI_CSS_NSEC_UART_BASE
-#define PLAT_ARM_UART_CLK_IN_HZ SGI_CSS_NSEC_CLK_IN_HZ
+#define PLAT_ARM_UART_BASE NRD_CSS_NSEC_UART_BASE
+#define PLAT_ARM_UART_CLK_IN_HZ NRD_CSS_NSEC_CLK_IN_HZ
/* Base address of trusted watchdog (SP805) */
#define SP805_TWDOG_BASE UL(0x2A480000)
diff --git a/plat/arm/neoverse_rd/common/nrd_common.mk b/plat/arm/neoverse_rd/common/nrd_common.mk
index 72aaff1..10ee08b 100644
--- a/plat/arm/neoverse_rd/common/nrd_common.mk
+++ b/plat/arm/neoverse_rd/common/nrd_common.mk
@@ -20,7 +20,7 @@
include plat/arm/common/arm_common.mk
ifeq (${USE_NVM},1)
-$(error "USE_NVM is not supported on SGI platforms")
+$(error "USE_NVM is not supported on Neoverse RD platforms")
endif
# Pass NRD_PLATFORM_VARIANT flag to the build system
diff --git a/plat/arm/neoverse_rd/common/nrd_mem_prot.c b/plat/arm/neoverse_rd/common/nrd_mem_prot.c
index 3a0b2fe..9ea25e8 100644
--- a/plat/arm/neoverse_rd/common/nrd_mem_prot.c
+++ b/plat/arm/neoverse_rd/common/nrd_mem_prot.c
@@ -6,11 +6,11 @@
#include <platform.h>
-#define SGI_DRAM1_NS_START (TFTF_BASE + 0x4000000)
-#define SGI_DRAM1_NS_SIZE 0x10000000
+#define NRD_DRAM1_NS_START (TFTF_BASE + 0x4000000)
+#define NRD_DRAM1_NS_SIZE 0x10000000
static const mem_region_t nrd_ram_ranges[] = {
- { SGI_DRAM1_NS_START, SGI_DRAM1_NS_SIZE },
+ { NRD_DRAM1_NS_START, NRD_DRAM1_NS_SIZE },
};
const mem_region_t *plat_get_prot_regions(int *nelem)
diff --git a/plat/arm/neoverse_rd/common/nrd_pwr_state.c b/plat/arm/neoverse_rd/common/nrd_pwr_state.c
index 7b01257..31f81dd 100644
--- a/plat/arm/neoverse_rd/common/nrd_pwr_state.c
+++ b/plat/arm/neoverse_rd/common/nrd_pwr_state.c
@@ -7,27 +7,27 @@
#include <platform.h>
#include <psci.h>
-/* State IDs for local power states on SGI platforms. */
-#define SGI_PS_RUN_STATE_ID 0 /* Valid for CPUs and Clusters */
-#define SGI_PS_RETENTION_STATE_ID 1 /* Valid for only CPUs */
-#define SGI_PS_OFF_STATE_ID 2 /* Valid for CPUs and Clusters */
+/* State IDs for local power states on Neoverse RD platforms. */
+#define NRD_PS_RUN_STATE_ID 0 /* Valid for CPUs and Clusters */
+#define NRD_PS_RETENTION_STATE_ID 1 /* Valid for only CPUs */
+#define NRD_PS_OFF_STATE_ID 2 /* Valid for CPUs and Clusters */
/* Suspend depth definitions for each power state */
-#define SGI_PS_RUN_DEPTH 0
-#define SGI_PS_RETENTION_DEPTH 1
-#define SGI_PS_OFF_DEPTH 2
+#define NRD_PS_RUN_DEPTH 0
+#define NRD_PS_RETENTION_DEPTH 1
+#define NRD_PS_OFF_DEPTH 2
/* The state property array with details of idle state possible for the core */
static const plat_state_prop_t core_state_prop[] = {
- {SGI_PS_RETENTION_DEPTH, SGI_PS_RETENTION_STATE_ID,
+ {NRD_PS_RETENTION_DEPTH, NRD_PS_RETENTION_STATE_ID,
PSTATE_TYPE_STANDBY},
- {SGI_PS_OFF_DEPTH, SGI_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
+ {NRD_PS_OFF_DEPTH, NRD_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
{0},
};
/* The state property array with details of idle state possible for the cluster */
static const plat_state_prop_t cluster_state_prop[] = {
- {SGI_PS_OFF_DEPTH, SGI_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
+ {NRD_PS_OFF_DEPTH, NRD_PS_OFF_STATE_ID, PSTATE_TYPE_POWERDOWN},
{0},
};
diff --git a/plat/arm/neoverse_rd/common/plat_setup.c b/plat/arm/neoverse_rd/common/plat_setup.c
index e6d4c0d..4734bf0 100644
--- a/plat/arm/neoverse_rd/common/plat_setup.c
+++ b/plat/arm/neoverse_rd/common/plat_setup.c
@@ -8,9 +8,9 @@
#include <xlat_tables_v2.h>
static const mmap_region_t mmap[] = {
- MAP_REGION_FLAT(SGI_DEVICE0_BASE, SGI_DEVICE0_SIZE,
+ MAP_REGION_FLAT(NRD_DEVICE0_BASE, NRD_DEVICE0_SIZE,
MT_DEVICE | MT_RW | MT_NS),
- MAP_REGION_FLAT(SGI_DEVICE1_BASE, SGI_DEVICE1_SIZE,
+ MAP_REGION_FLAT(NRD_DEVICE1_BASE, NRD_DEVICE1_SIZE,
MT_DEVICE | MT_RW | MT_NS),
MAP_REGION_FLAT(DRAM_BASE, TFTF_BASE - DRAM_BASE,
MT_MEMORY | MT_RW | MT_NS),