Merge "feat(planes): test SIMD access from plane N"
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index 98bbab8..c73c68f 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -283,6 +283,10 @@
#define EL_IMPL_A64ONLY ULL(1)
#define EL_IMPL_A64_A32 ULL(2)
+/* ID_AA64DFR1_EL1 definitions */
+#define ID_AA64DFR1_BRP_SHIFT U(8)
+#define ID_AA64DFR1_BRP_WIDTH U(8)
+
/* ID_AA64ISAR0_EL1 definitions */
#define ID_AA64ISAR0_EL1 S3_0_C0_C6_0
#define ID_AA64ISAR0_RNDR_MASK ULL(0xf)
diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h
index d2b71ef..eb846cd 100644
--- a/include/lib/aarch64/arch_features.h
+++ b/include/lib/aarch64/arch_features.h
@@ -322,6 +322,12 @@
return (features & ID_AA64PFR1_EL1_SME_MASK) >= ID_AA64PFR1_EL1_SME2_SUPPORTED;
}
+/* Check if extended breakpoints are available part of Debugv8p9 */
+static inline bool is_feat_debugv8p9_ebwe_supported(void)
+{
+ return EXTRACT(ID_AA64DFR1_BRP, read_id_aa64dfr1_el1()) != 0U;
+}
+
static inline u_register_t get_id_aa64mmfr0_el0_tgran4(void)
{
return EXTRACT(ID_AA64MMFR0_EL1_TGRAN4, read_id_aa64mmfr0_el1());
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 580f90e..76e2431 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -192,6 +192,7 @@
DEFINE_SYSREG_READ_FUNC(id_aa64pfr1_el1)
DEFINE_RENAME_SYSREG_RW_FUNCS(id_aa64pfr2_el1, ID_AA64PFR2_EL1)
DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1)
+DEFINE_SYSREG_READ_FUNC(id_aa64dfr1_el1)
DEFINE_SYSREG_READ_FUNC(id_afr0_el1)
DEFINE_SYSREG_READ_FUNC(id_pfr0_el1)
DEFINE_SYSREG_READ_FUNC(CurrentEl)
diff --git a/tftf/tests/extensions/debugv8p9/test_debugv8p9.c b/tftf/tests/extensions/debugv8p9/test_debugv8p9.c
index 033aedb..f81c717 100644
--- a/tftf/tests/extensions/debugv8p9/test_debugv8p9.c
+++ b/tftf/tests/extensions/debugv8p9/test_debugv8p9.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,7 +16,13 @@
#if __aarch64__
SKIP_TEST_IF_DEBUGV8P9_NOT_SUPPORTED();
+ if (!is_feat_debugv8p9_ebwe_supported()) {
+ return TEST_RESULT_SKIPPED;
+ }
+
+ /* Is RES0 if NUM_BREAKPOINTS <= 16 */
read_mdselr_el1();
-#endif
+
return TEST_RESULT_SUCCESS;
+#endif
}
diff --git a/tftf/tests/runtime_services/arm_arch_svc/smccc_feature_availability.c b/tftf/tests/runtime_services/arm_arch_svc/smccc_feature_availability.c
index f827522..76b74a9 100644
--- a/tftf/tests/runtime_services/arm_arch_svc/smccc_feature_availability.c
+++ b/tftf/tests/runtime_services/arm_arch_svc/smccc_feature_availability.c
@@ -107,6 +107,7 @@
CHECK_NO_BITS_SET(CPTR_EL3);
reg = get_feature_for_reg(MDCR_EL3_OPCODE);
+ CHECK_BIT_SET(is_feat_debugv8p9_ebwe_supported, MDCR_EBWE_BIT);
CHECK_BIT_SET(get_feat_brbe_support, MDCR_SBRBE(1));
CHECK_BIT_SET(is_armv8_6_fgt_present, MDCR_TDCC_BIT);
CHECK_BIT_SET(is_feat_trbe_present, MDCR_NSTB(1));