refactor(xilinx): mark ttc clock select platform specific
TTC clock select register(TTC_CLK_SEL) is used to select
TTC reference clock.
The offset for TTC_CLK_SEL in LPD_IOU_SLCR register module
differs on various AMD xilinx platforms.
Offset is 0x380 for zynqmp platform and is 0x360 for versal
and versal-net platforms.
According define offset for TTC clock select in platform
specific files.
Change-Id: I479f655704fcc515068425eedc5d73d24a32dde0
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
3 files changed