test(el3-runtime): check DIT is retained on exception
Add a test to check that the PSTATE bits not set in the
Aarch64.TakeException but set to a default when taking an exception to
EL3 are maintained after an exception and that changes in TSP do not
effect the PSTATE in TFTF and vice versa.
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: Id4d625c7e9cbb565ac236f844274319cc02c2335
diff --git a/include/lib/aarch32/arch_features.h b/include/lib/aarch32/arch_features.h
index 1addc44..3c6a338 100644
--- a/include/lib/aarch32/arch_features.h
+++ b/include/lib/aarch32/arch_features.h
@@ -42,6 +42,12 @@
ID_DFR0_TRACEFILT_SUPPORTED;
}
+static inline bool is_armv8_4_dit_present(void)
+{
+ return ((read_id_pfr0() >> ID_PFR0_DIT_SHIFT) &
+ ID_PFR0_DIT_MASK) != 0;
+}
+
static inline bool get_armv8_0_sys_reg_trace_support(void)
{
return ((read_id_dfr0() >> ID_DFR0_COPTRC_SHIFT) &
diff --git a/include/lib/aarch32/arch_helpers.h b/include/lib/aarch32/arch_helpers.h
index 6e1097d..aca3952 100644
--- a/include/lib/aarch32/arch_helpers.h
+++ b/include/lib/aarch32/arch_helpers.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -422,6 +422,9 @@
#define read_daif() read_cpsr()
#define write_daif(flags) write_cpsr(flags)
+#define read_dit() read_cpsr()
+#define write_dit(flags) write_cpsr(flags)
+
#define read_cnthp_cval_el2() read64_cnthp_cval_el2()
#define write_cnthp_cval_el2(v) write64_cnthp_cval_el2(v)