fix(versal-net): correct core position function
The corrected calculation of core positions involves utilizing the
linear core and cluster IDs from an MPID register. The MPID register
comprises three affinity levels: Aff0 (bits 0 to 7), Aff1 (bits 8 to 15),
and Aff2 (bits 16 to 23).
In the current implementation of platform_get_core_pos(), the function
reads the MPIDR_AFF0_SHIFT (0 to 7 bits) for the core ID and
MPIDR_AFF1_SHIFT (8 to 15 bits) for the cluster ID. For example, in
the output "CPU #10 [MPID: 0x1020200]," it incorrectly returns the
core position as 8 instead of the expected core position 10.
In the updated implementation of the platform_get_core_pos() function,
the core ID is determined by reading the bits corresponding to Affinity
level 1 (MPIDR_AFF1_SHIFT), and the cluster ID is determined by reading
the bits corresponding to Affinity level 2 (MPIDR_AFF2_SHIFT).
To address this issue and obtain the correct core ID, it is necessary
to read affinity level 1 bits. Additionally, affinity level 2 should
be read to determine the cluster ID. A check has been incorporated to
verify the MT bit in MPIDR for enabled status, leading to a modification
in cluster/core calculation. Additionally, it is necessary to define
PLAT_MAX_PE_PER_CPU for the affinity test.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I07573e82908ec6f2404423d61639646d411502cd
2 files changed