commit | d8bfc12adf630774736717f9b8cf31f22c0579e2 | [log] [tgz] |
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author | Thomas Bourgoin <thomas.bourgoin@foss.st.com> | Fri Apr 25 17:30:10 2025 +0200 |
committer | Jerome Forissier <jerome@forissier.org> | Fri Jul 18 10:56:25 2025 +0200 |
tree | 00d39e1613bb0fe4bc4ef160b611b391b4f96525 | |
parent | fcbd9ef9bc9807a7f755ffdb0b5e00b324f3d1f4 [diff] |
plat: stm32mp2: sysconf: fix CA35SS register names Align register names with the reference manuel for Arm Cortex-A35 (CA35SS) - CA35SS SYSCFG registers (with 0x2000 offset) - CA35SS Standardized status and control (SSC) registers This path removes the confusion between SSC and subsystem (SS). Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Co-developed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
This git contains source code for the secure side implementation of OP-TEE project.
All official OP-TEE documentation has moved to http://optee.readthedocs.io.
// OP-TEE core maintainers