commit | 29661368f51dc258d8c3f83dc0e53e9e3c9081b4 | [log] [tgz] |
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author | Yu-Chien Peter Lin <peter.lin@sifive.com> | Sun Jun 01 02:43:56 2025 -0700 |
committer | Jerome Forissier <jerome@forissier.org> | Wed Jun 18 09:36:09 2025 +0200 |
tree | 7ffa273fabda14d77b27541d4258fc80768b3bbe | |
parent | e90887e3f478ad38118e76c3aee2a9c41c12aa31 [diff] |
core: riscv: preserve hartid in s0 register at entry point The hartid is initially passed in a0 register. Since we will introduce function calls in subsequent patches and a0 is caller-saved per RISC-V calling convention, preserve the hart ID in s0 (callee-saved) to avoid unnecessary save-restore operations when making function calls. Also, use temporary registers instead in set_tp, makes it more consistent with set_sp. Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Suggested-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Alvin Chang <alvinga@andestech.com>
This git contains source code for the secure side implementation of OP-TEE project.
All official OP-TEE documentation has moved to http://optee.readthedocs.io.
// OP-TEE core maintainers