blob: a075d1a88ae7b60a8341e85b4b61bb539ddb816d [file] [log] [blame]
Joakim Bech13dc81c2019-02-04 15:13:17 +01001# Credits to Petr Tesarik from SUSE who provided this updated configuration,
2# source: https://www.suse.com/c/debugging-raspberry-pi-3-with-jtag/
Philip Attfieldc14e9522016-09-14 07:57:07 +02003transport select jtag
4
Joakim Bech13dc81c2019-02-04 15:13:17 +01005# we need to enable srst even though we don't connect it
6reset_config trst_and_srst
7
Philip Attfieldc14e9522016-09-14 07:57:07 +02008adapter_khz 1000
Joakim Bech13dc81c2019-02-04 15:13:17 +01009jtag_ntrst_delay 500
Philip Attfieldc14e9522016-09-14 07:57:07 +020010
Joakim Bech13dc81c2019-02-04 15:13:17 +010011if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
13} else {
14 set _CHIPNAME rpi3
Philip Attfieldc14e9522016-09-14 07:57:07 +020015}
16
Joakim Bech13dc81c2019-02-04 15:13:17 +010017#
18# Main DAP
19#
20if { [info exists DAP_TAPID] } {
21 set _DAP_TAPID $DAP_TAPID
22} else {
23 set _DAP_TAPID 0x4ba00477
24}
25
26jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -enable
27dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap
28
29set _TARGETNAME $_CHIPNAME.a53
30set _CTINAME $_CHIPNAME.cti
31
32set DBGBASE {0x80010000 0x80012000 0x80014000 0x80016000}
33set CTIBASE {0x80018000 0x80019000 0x8001a000 0x8001b000}
34set _cores 4
35
36for { set _core 0 } { $_core < $_cores } { incr _core } {
37
38 cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 0 \
39 -ctibase [lindex $CTIBASE $_core]
40
41 target create $_TARGETNAME.$_core aarch64 \
42 -dap $_CHIPNAME.dap -coreid $_core \
43 -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core
44
45 $_TARGETNAME.$_core configure -event reset-assert-post "aarch64 dbginit"
46 $_TARGETNAME.$_core configure -event gdb-attach { halt }
Philip Attfieldc14e9522016-09-14 07:57:07 +020047}