qemu_v8: provide manifest for S-EL1 SPMC
Adds a DTS manifest for S-EL1 SPMC.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
diff --git a/qemu_v8.mk b/qemu_v8.mk
index df0c43e..14b2c7c 100644
--- a/qemu_v8.mk
+++ b/qemu_v8.mk
@@ -176,6 +176,7 @@
TF_A_FLAGS_SPMC_AT_EL_1 = $(TF_A_FLAGS_BL32_OPTEE) SPD=spmd
TF_A_FLAGS_SPMC_AT_EL_1 += CTX_INCLUDE_EL2_REGS=0 SPMD_SPM_AT_SEL2=0
TF_A_FLAGS_SPMC_AT_EL_1 += ENABLE_SME_FOR_NS=0 ENABLE_SME_FOR_SWD=0
+TF_A_FLAGS_SPMC_AT_EL_1 += QEMU_TOS_FW_CONFIG_DTS=../build/qemu_v8/spmc_el1_manifest.dts
TF_A_FLAGS_SPMC_AT_EL_1 += SPMC_OPTEE=1
TF_A_FLAGS_SPMC_AT_EL_3 = SPD=spmd SPMC_AT_EL3=1
TF_A_FLAGS_SPMC_AT_EL_3 += CTX_INCLUDE_EL2_REGS=0 SPMD_SPM_AT_SEL2=0
@@ -215,7 +216,10 @@
ln -sf $(TF_A_OUT)/nt_fw_key.crt $(BINARIES_PATH)
ln -sf $(TF_A_OUT)/nt_fw_content.crt $(BINARIES_PATH)
endif
-ifeq ($(SPMC_AT_EL),3)
+ifeq ($(SPMC_AT_EL),1)
+ ln -sf $(TF_A_OUT)/fdts/spmc_el1_manifest.dtb \
+ $(BINARIES_PATH)/tos_fw_config.dtb
+else ifeq ($(SPMC_AT_EL),3)
ln -sf $(TF_A_OUT)/fdts/spmc_el3_manifest.dtb \
$(BINARIES_PATH)/tos_fw_config.dtb
ln -sf $(OPTEE_OS_PAGER_V2_BIN) $(BINARIES_PATH)/bl32.bin
diff --git a/qemu_v8/spmc_el1_manifest.dts b/qemu_v8/spmc_el1_manifest.dts
new file mode 100644
index 0000000..5c856d3
--- /dev/null
+++ b/qemu_v8/spmc_el1_manifest.dts
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2022 The Hafnium Authors.
+ *
+ * Use of this source code is governed by a BSD-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/BSD-3-Clause.
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "arm,ffa-core-manifest-1.0";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ attribute {
+ spmc_id = <0x8000>;
+ maj_ver = <0x1>;
+ min_ver = <0x0>;
+ exec_state = <0x0>;
+ load_address = <0x0 0xe100000>;
+ entrypoint = <0x0 0xe100000>;
+ binary_size = <0x80000>;
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ };
+ };
+
+ /* VIRT_SECURE_MEM */
+ memory@e000000 {
+ device_type = "memory";
+ reg = <0x0 0xe000000 0x1000000>;
+ };
+};