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author | Olivier Deprez <olivier.deprez@arm.com> | 2020-06-04 08:27:49 +0200 |
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committer | Andrew Walbran <qwandor@google.com> | 2020-06-11 14:50:10 +0000 |
commit | fa880d1653b01ffa13da26e0edbc2464a1883887 (patch) | |
tree | ac675ee7be3ee5be366068953f26ffa013b744a3 | |
parent | 37c574e86a45da24e9fa82e95c0fd469438631fc (diff) | |
download | hafnium-fa880d1653b01ffa13da26e0edbc2464a1883887.tar.gz |
Fix CPTR_EL2 TTA bit position
CPTR_EL2.TTA register bit position depends on HCR_EL2.E2H setting.
When ARMv8.1-VHE is disabled (HCR_EL2.E2H=0) CPTR_EL2.TTA is bit 20.
Change-Id: I3df1f54f6e33ea5d88fb13a1ab2249a79bca5fbd
-rw-r--r-- | src/arch/aarch64/sysregs.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/aarch64/sysregs.h b/src/arch/aarch64/sysregs.h index 9dbd1656a..d262d9a8e 100644 --- a/src/arch/aarch64/sysregs.h +++ b/src/arch/aarch64/sysregs.h @@ -466,8 +466,9 @@ * Trap system register accesses to trace registers. * Traps accesses to ETM registers using the register interface. Does not trap * on accesses through the memory-mapped interface. + * CPTR_EL2.TTA is register bit 20 when HCR_EL2.E2H=0 (ARMv8.1-VHE disabled). */ -#define CPTR_EL2_TTA (UINT64_C(0x1) << 28) +#define CPTR_EL2_TTA (UINT64_C(0x1) << 20) /* * Process State Bit definitions. |