blob: ccfde9ce39ce6be1d9a5e3e6334974ff7476d427 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
|
/*
* Copyright (c) 2018-2019 Arm Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* \file musca_b1_eflash_drv.c
*
* \brief Process specifinc implementation of GFC100 flash controller for
* Musca B1 board.
*/
#include "gfc100_process_spec_api.h"
void gfc100_proc_spec_set_eflash_timing(uint32_t reg_map_base,
uint32_t sys_clk)
{
(void)sys_clk;
*(uint32_t *)reg_map_base = 0x11082801;
*(uint32_t *)(reg_map_base + 4U) = 0x64050208;
*(uint32_t *)(reg_map_base + 8U) = 0xa0a0a08;
}
uint32_t gfc100_proc_spec_get_eflash_word_width(uint32_t reg_map_base)
{
(void)reg_map_base;
return 128U;
}
uint32_t gfc100_proc_spec_get_eflash_size(uint32_t reg_map_base)
{
(void)reg_map_base;
return 0x200000U;
}
uint32_t gfc100_proc_spec_get_eflash_page_size(uint32_t reg_map_base)
{
(void)reg_map_base;
return 0x4000;
}
uint32_t gfc100_proc_spec_get_num_of_info_pages(uint32_t reg_map_base)
{
(void)reg_map_base;
return 3U;
}
uint32_t gfc100_proc_spec_get_error_cause(uint32_t reg_map_base)
{
return *(uint32_t *)(reg_map_base + 0x18);
}
|