aboutsummaryrefslogtreecommitdiff
path: root/platform/ext/target
AgeCommit message (Collapse)Author
8 hoursRSE: Fremont: Load LCP 1-N ramfw imagesHEADmainJoel Goddard
Fremont has more than one LCP in the system and all the LCPs need to be loaded with the same image. Loading a single image to multiple destination is currently not supported by MCUBoot. In order to load the LCP image to N LCP designations, load copies of the LCP ramfw to each LCP in the system by changing the ATU regions and calling boot_go_for_image_id manually for each LCP after LCP 0. Also, introduce build flag for LCP count as different Fremont variants can have different LCP count. Co-authored-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I2998d1b53f600f503a31ea2d100fef07acf7ea1d
8 hoursRSE: Fremont: Load LCP 0 ramfw imageJoel Goddard
* Update the flash layout and flash map info with LCP image details. * Program RSE ATU to access the LCP ITCM via Cluster Utility region. * As with SCP and MCP, the RSE ATU is setup so the code section of the image is aligned with the start of the LCP ITCM in physical memory but the header is contiguous in RSE logical memory. Co-authored-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I3d02521d6bbaddcb6b311b9dfb7ae00d47c78271
23 hoursRSE: Fremont: Configure System Control NI-Tower under SYSTOPArnold Gabriel Benedict
NI-Tower has programmable address maps (PSAM) and Access Protection Units (APU) which can be configured during boot time which it uses to map system addresses to interconnect targets for routing purposes as well as to specify access permissions to configured regions. Several nodes in the System Control NI-Tower instances are under SYSTOP power domain rather than on the AON domain. So configure PSAMs and APUs under SYSTOP power domain after RSE completes loading of SCP. The support for RSE to wait for the SCP to complete the SYSTOP init will be introduced in the subsequent patches. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: If078673a1a8d097d40357ef41f8534537ee93bdc
23 hoursRSE: Fremont: Add lcp_axis APU configArnold Gabriel Benedict
Add APU regions for the lcp_axis requester side interface. This interface is on the requester side and does permissions checks for the transactions targeting the SCP from LCP. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I65c588888a17cd45cb48ecdf013eaddc2d55898d
23 hoursRSE: Fremont: Add lcp_axim APU configArnold Gabriel Benedict
Add APU regions for the lcp_axim completer side interface. This interface is on the completer side and does permissions checks for the transactions targeting the Cluster Utility space. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Ife3395e5b8f2baff689d537a6572882235071bf2
23 hoursRSE: Fremont: Add app_axim APU configArnold Gabriel Benedict
Add APU regions for the app_axim completer side interface. This interface is on the completer side and does permissions checks for the transactions targeting the IO Block and Memory Controller + MPE register space. This APU also does ID based filtering and currently, all four valid requester IDs are enabled. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I342b462665016ad396b5514d31623143419fbebf
23 hoursRSE: Fremont: Add app_axis APU configArnold Gabriel Benedict
APP AXIS APU is responsible for PAS filtering for the transaction originating at the app_axis interface. Add APU regions for app_axis interface to check the permissions targeting the SCP, MCP and RSE peripherals from AP. Since app_axis interface is present under the SYSTOP power domain and not under the AON power domain, a new function is introduced to configure the APUs under the SYSTOP domain and app_axis APU will be programmed as part of it. Note: The interfaces under SYSTOP domain can be accessed only after SYSTOP is initialized. Accessing these node before SYSTOP init will lead to error. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I8c41310de0cc04100434f30d1047fdaa5540b24c
23 hoursRSE: Fremont: Add lcp_axis PSAM configArnold Gabriel Benedict
Add PSAM region mappings for the lcp_axis requester interface of the System Control NI-Tower instance. All physical address originating from LCP will be mapped to the target interface LCP-SCP AXIM. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I50665de1997ae59db296a2bc862d3204cc8244e1
23 hoursRSE: Fremont: Add app_axis PSAM configArnold Gabriel Benedict
Add PSAM region mappings for the app_axis interface of the System Control NI-Tower instance. The physical address coming out of AP will be mapped to the target interface based on these PSAM region mappings. Since this interface is under the SYSTOP power domain and not under the AON power domain, a new function is introduced to configure the PSAMs under the SYSTOP domain and app_axis will be programmed as part of it. Note: The interfaces under SYSTOP domain can be accessed only after SYSTOP is initialized. Accessing these node before SYSTOP init will lead to error. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I29dfd8a14f87d5d5ddf51850c419a5e532712536
27 hoursRSE: Make integrity checker accesses privilegedRaef Coles
Change-Id: I5fd5df8edae0c81c6748df9d511e10a37b842b31 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Log provisioning progressRaef Coles
Change-Id: Ie9610565783026b0aa92943c164dd14b6a262d84 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Change bringup helpers orderRaef Coles
Check GPPC first, as it is less ephemeral. Also, attempt to run other helpers if one does not trigger a jump. Change-Id: Ia6a008cddc578fc787d01aa989188c972785b5c5 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Update DMA ICS to use 8-byte ICS wordsRaef Coles
Change-Id: Ib6a1052d6801b379f1b9f0a10a0ed987331dab5c Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Align manufacturing data to 8 byte boundaryRaef Coles
Change-Id: I3d5e7c0f7655a48279468349895f686e2c1c3147 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Sanity check that LCM zero counts fitRaef Coles
And don't overflow their fields Change-Id: If4bcce66a9d26a9c41340d24edc12ce5dbfda204 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Align integrity checked items to 8 bytesRaef Coles
To match integrity checker specification. Also, change the ICDL register calculation to use 8 byte words. Change-Id: I7ff8756d64b1372e820d5ddcb7df187ee1097273 Signed-off-by: Raef Coles <raef.coles@arm.com>
27 hoursRSE: Remove SAM config from OTP and provisioningRaef Coles
As it is part of the OTP ICS Change-Id: I99395625931ed78086d38ef23da96dd5673a1e14 Signed-off-by: Raef Coles <raef.coles@arm.com>
2 daysRSE: Fremont: Allow SCP to control SCP ATUJoel Goddard
RSE can control whether SCP can configure its ATU or whether it is managed by RSE. RSE managing SCP ATU is not available yet, so allow SCP to manage its own ATU. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I6d628dcaad9632edbb520ab7b4bee1fd27fa51d2
2 daysRSE: Fremont: Release MCP and SCP CPU from haltJoel Goddard
SCP and MCP are in a halted state and RSE is responsible for releasing it from halt after the image loading to respective ITCM is completed. This is done by configuring the MSCP_CPU_INIT_CTRL in the SCP RAS and INIT Control registers address space. Use MSCP drivers to unhalt SCP and MCP during post init stages of respective firmware loading. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I94ba77ec4ecfc95f71626db55a691a7b08008168
2 daysRSE: Fremont: Configure SCP and MCP driversJoel Goddard
Configure two instances of MSCP driver for SCP and MCP respectively. As SCP and MCP are host devices specify ATU region for access SCP and MCP registers. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I922981ffdd79d7e497032801e55612a077141dbc
2 daysRSE: Fremont: Add driver for SCP/MCPJoel Goddard
Add MSCP driver which contains drivers for configuring registers in SCP or MCP address space. At present add support to release CPU from halt. Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: Iaba10e11eb9e4a504e6852cbb0207be913872120
2 daysRSE: Fremont: Load MCP imageJoel Goddard
Configure MCUBoot to load MCP firmware image in RD-Fremont: * Update flash layout and flash map with MCP image details * Load MCP code directly to the start of the MCP ITCM. To do this the ATU is used to map the MCUBoot image header to a different physical area of memory while maintaining a contiguous logical addresses. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: Id45ec2a4e0c554a69338882873c2e204b42a779b
2 daysRSE: Fremont: Load SCP imageJoel Goddard
Configure MCUBoot to load SCP firmware image in RD-Fremont: * Update flash layout and flash map with SCP image details * Load SCP code directly to the start of the SCP ITCM. To do this the ATU is used to map the MCUBoot image header to a different physical area of memory while maintaining a contiguous logical addresses. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I0ac54c1c5773bd3c93fbe9718219402a2547d289
2 daysRSE: Increase measureboot shared memory sizeJoel Goddard
The shared memory for storing measureboot data is not large enough to store the data for all images in RD-Fremont. To ensure there is sufficient space, expand the shared data region. Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: I2ae50a45756cdf476b84cb69d146754fc53471ad
2 daysRSE: Fremont: Configure System Control NI-Tower under AONArnold Gabriel Benedict
NI-Tower has programmable address maps (PSAM) and Access Protection Units (APU) which can be configured during boot time. It uses these to map system addresses to interconnect targets for routing purposes as well as to specify access permissions to configured regions. Configure PSAMs and APUs under Always-On (AON) power domain within the System Control NI-Tower instance. RSE is required to configure the system control NI-Tower before making any accesses to SCP/MCP or AP address space. In addition to this, enable the build of NI-Tower driver and the corresponding platform configuration data for the system control NI-Tower instance by setting the PLATFORM_HAS_NI_TOWER flag. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Ifdbd53fc37fc23b03f3c372a948bd0311e55ebc1
2 daysRSE: Fremont: Add rse_mcp_axim APU configArnold Gabriel Benedict
RSE MCP AXIM APU is the completer side filter that is present in front of the MCP. Add APU regions for rse_mcp_axis interface to check the permissions for the transactions coming from RSE and targeting the MCP. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I5a0fc6f5929945c5b0d2d41d11e0547553ad829e
2 daysRSE: Fremont: Add rse_scp_axim APU configArnold Gabriel Benedict
RSE SCP AXIM APU is the completer side filter that is present in front of the SCP. Add APU regions for rse_scp_axis interface to check the permissions for the transactions coming from RSE and targeting the SCP. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I5c9e110c877c57a9bd2783f1708004407c1dc1af
2 daysRSE: Fremont: Add rsm_apbm APU configArnold Gabriel Benedict
RSM APBM APU is the completer side filter that is present in front of the ECC record register block for Shared RAM between RSE, SCP and MCP (RSM). Add APU regions for rsm_apbm interface to check the permissions targeting the ECC record register block for Shared RAM between RSE, SCP and MCP. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I7267cf5a9a9f26585f56501dc9c836f53b476db0
2 daysRSE: Fremont: Add rsm_axim APU configArnold Gabriel Benedict
RSM AXIM APU is the completer side filter that is present in front of the RSM SRAM (Shared SRAM between RSE/SCP/MCP). Add APU regions for rsm_axim interface to check the permissions targeting the RSM SRAM. Currently, all permissions are allowed. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I4cfa9b83e8cda91818eb8933db8f2666dd86b966
2 daysRSE: Fremont: Add mcp_axis APU configArnold Gabriel Benedict
Each NI-Tower APU has registers for configuring the address regions it protects along with entity access permission. MCP AXIS APU is the requester side filter that is present at the output of the MCP ATU. Add APU regions for mcp_axis interface to check the permissions targeting the Generic refclk in SCP and the shared RSM SRAM. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Iaac605e153e1aeeda6d39641d0e6887c6eddc911
2 daysRSE: Fremont: Add rse_scp_axis PSAM configArnold Gabriel Benedict
Add PSAM address map to map access from RSE and SCP targeting LCP address space. All access from RSE and SCP that target to LCP is routed via a NIC400 outside of System Control NI-Tower and sent to the 'rse_scp_axis' on the NI-Tower. This is necessitated because address filtering on transactions based on the LCP memory map is required in the NI-Tower, but the target 'lcp_axim' interface APU can only do address filtering for upto 8 LCPs. Hence, for every transaction targeting the LCP, the upper address bits are propagated via AXI USER bits rather than on the AXI address signals and the address filtering is applied based on the lower address bits. With this, NI-Tower has to handle only on a 'single' LCP in the system, regardless of the number of LCPs in the system or regardless of the chip address offset. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Ib203ea14e5f96e6810dd5dae29f00aec808a533c
2 daysRSE: Fremont: Add 'host_clus_util_lcp_memory_map.h'Arnold Gabriel Benedict
As a preparation to add use Cluster Utility and LCP memory map definitions, add 'host_clus_util_lcp__memory_map.h' file. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I7cec3c00ec9eb667de89a70a19976ff8092be74a
2 daysRSE: Fremont: Add mcp_axis PSAM configArnold Gabriel Benedict
Add PSAM region mappings for the mcp_axis requester interface of the System Control NI-Tower instance. The physical address coming out of MCP ATU will be mapped to the target interface based on this PSAM region mappings. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Ifddb03640d9e232c079a957125907e71ad751091
2 daysRSE: Fremont: Add scp_axis PSAM configArnold Gabriel Benedict
Add PSAM region mappings for the scp_axis requester interface of the System Control NI-Tower instance. The physical address coming out of SCP ATU will be mapped to the target interface based on this PSAM region mappings. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I92f1c870a8288141e27d75cceeb8d56f7c9f09f4
2 daysRSE: Fremont: Add rse_main_axis PSAM configArnold Gabriel Benedict
System Control NI-Tower is the interconnect between the AXI interfaces of RSE, SCP/MCP and the CMN interconnect. This NI-Tower has programmable address maps (PSAM) and Access Protection Units (APU) which can be configured during boot time. It uses these to map system addresses to interconnect targets for routing purposes as well as to specify access permissions to configured regions. RSE is required to configure the system control NI-Tower before making any accesses to SCP/MCP or AP address space. Add PSAM region mappings for the rse_main_axis requester interface of the System Control NI-Tower instance under Always-On (AON) power domain. The physical address coming out of RSE ATU will be mapped to the target interface based on this PSAM region mappings. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I15447ea5e33e8b7fc46bb21841b835d7eb0f1663
2 daysRSE: Fremont: Add system control NI-Tower interface idsArnold Gabriel Benedict
System Control NI-Tower is the interconnect between the AXI interfaces of RSE, SCP/MCP and the CMN interconnect. Add interface IDs for every xSNI and xMNI interfaces connected to this system control NI-Tower. The interface ID is pre-configured by the platform hardware configurations. These IDs are required to fetch offset address for register bases of NI-Tower components and subfeatures. Also, the target IDs can be used while configuring PSAMs within the NI-Tower. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I47a21a7e82b453a11c2785754b7ada81476d7eaa
2 daysRSE: Fremont: Add host_css_memory_map.hArnold Gabriel Benedict
As a preparation to add more host specific memory map definitions, add 'host_css_memory_map.h' file and move existing definitions to it. In context of RSE, host includes all addresses in chip which is not directly accessible by RSE. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Id113e8d46d5a710aa655a290a9dec3e200c1747d
2 daysRSE: host_drivers: Allow NI-Tower config init to next available regionArnold Gabriel Benedict
Add functions to PSAM and APU to initialize new configuration to an unconfigured region. These functions find the region number of next available region by iterating over all the region configuration registers in the controller. If a region is not enabled, then add the configuration to that region. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Iabc545db005efb762db16c9c023d6353f0b03d34
2 daysRSE: host_drivers: Add device config struct to NI-Tower subfeaturesArnold Gabriel Benedict
Refactor 'component_node_type' and 'component_node_id' fields under 'ni_tower_psam_cfgs' and 'ni_tower_apu_cfgs' into a new dev_cfg structure. This refactoring is necessary to allow device configurations to be reusable during multiple configurations to a specific PSAM or an APU. Template to configure a region within a PSAM, .. struct ni_tower_psam_dev_cfg PSAM_DEV_CFG = { .component_node_type = NI_TOWER_ASNI, .component_node_id = < asni_node_id >, }; struct ni_tower_dev NI_TOWER_DEV = { .periphbase = < ni_tower_base_address >, .config_node_granularity = NI_TOWER_64KB_CONFIG_NODES }; .. .. /* Array of regions within the PSAM */ static struct ni_tower_psam_reg_cfg_info psam_axis_0[] = { { < region_start_address >, < region_end_address >, < target_id > } }; /* Array of all PSAMs to be configured */ struct ni_tower_psam_cfgs psam_table[] = { { .dev_cfg = &PSAM_DEV_CFG, .nh_region_count = 1, .regions = psam_axis_0, }, }; ni_tower_program_psam_table(&NI_TOWER_DEV, psam_table, 1); Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: Ie7f3e503d816aff863048a8d6afc1db39f582416
2 daysRSE: host_drivers: Check region overlap for NI-tower subfeature configsArnold Gabriel Benedict
When configuring PSAM or APU regions, the memory region entry could overlap with another region, which is already enabled in the PSAM or APU. Check if the base address and end address of the new entry overlaps with existing/enabled entry in the node. In case of APU, two foreground regions or two background region should'nt overlap. Whereas, a foreground region can overlap two background region. The APU priorities the foreground access permission in such case. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I6eb69486b75c10cdf80f54740889cc64239f7210
2 daysRSE: host_drivers: Fix NI-Tower APU re-configuration issuesArnold Gabriel Benedict
When reconfiguring an APU region, previously set permissions or APU ids were not cleared out, leading to wrong configuration of permissions or APU ids. Resolve this issue by clearing out the permissions and APU ids before programming the new values. Also, if a region is locked, re-programming a region should not be allowed to avoid any exceptions raised by the NI-Tower. Add a check to disallow re-configuration when a region is locked. Signed-off-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com> Change-Id: I9c1f9aa18e20b79f8acaa4d59fd264647ecc6e2e
2 daysPlatform: Alcor: Add armchina alcor an557 platform portJidongMei
Change-Id: I310c27a97dca165c0151b680fca0f7db19bcc338 Signed-off-by: JidongMei <Jidong.Mei@armchina.com>
2 daysiararm: Move __NO_RETURN macro before function definitionsGergely Korcsák
From CMSIS6, IARARM compiler only supports the `__NO_RETURN` macro before the function definition. Builds were failing if you compiled with IARARM toolchain. Signed-off-by: Gergely Korcsák <gergely.korcsak@arm.com> Change-Id: I0b89fcbb7b1ec94e886bb74c94ebb696ce90c988
3 daysPlatform: nxp: Workaround CMSISv6 update errorAndrej Butok
Workaround the LPCXpresso55s69 compilation error in fsl_common_arm.c after TFM upgrade to CMSISv6. Change-Id: I22470474f37bfb8dd68961254515df94e022f69d Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
6 daysPlatform: RSE: Add simplified startup file for bootloadersJamie Fox
Adds a cut-down startup file for BL1_2 and BL2 based on the BL1_1 version. It removes interrupt handlers, PSP and stack sealing, which are not required in bootloaders. Signed-off-by: Jamie Fox <jamie.fox@arm.com> Change-Id: I7b2e6998210c1c4d43bae3c0e41e663e37dbb06a
7 daysplatform: nordic_nrf: Make NRFX_ASSERT use SPM_ASSERTVidar Lillebø
Changes nrfx_glue.h to use SPM_ASSERT instead of libc assert so message is written to log on assertion failure. Change-Id: Ided1e3ebec3b11b41d9c3ee3940e1000b81e2445 Signed-off-by: Vidar Lillebø <vidar.lillebo@nordicsemi.no>
9 daysCC3XX: Compute shared secret following SEC1 paragraph 3.3.1Antonio de Angelis
Add an API in the EC module to compute a shared secret following the description available in SEC1 paragraph 3.3.1, leveraging the scalar / point multiplication primitives Signed-off-by: Antonio de Angelis <antonio.deangelis@arm.com> Change-Id: Ib45cf8a23ae37c792870fd6f71f18b20d0c2e9b4
9 daysBuild: Add TF-M sanitization build optionRaef Coles
Change-Id: I6b9714930e54a2e39cac807e4cc01b1f024ba3e2 Signed-off-by: Raef Coles <raef.coles@arm.com>
10 daysRSE: Split ROM library relocation support configRaef Coles
Split into two separate config options, one to support copying the ROM library into SRAM and one to actually enable the option. Change-Id: I040f3b4c87e8de733a0d947f97f4f8e4ae9e187e Signed-off-by: Raef Coles <raef.coles@arm.com>
10 daysRSE: Fix warnings in CC3XX KMU loaderRaef Coles
Also, remove erroneous debug while loops Change-Id: I6b68039ee3532418de1292a3df88b5239613562e Signed-off-by: Raef Coles <raef.coles@arm.com>