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- updated docs for psoc62, psoc64 and psoc64_1m platforms
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I9f0c290bdb916ca799bc2cf374006d21f424f3be
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With this change, script can sign each image individually or
both in the same time.
As long as cysecuretools sign_image overwrites unsigned image file
with the signed one, script creates a copy of the original image
and signs the copy.
For CM4, sign_image also creates an unsigned copy of the image
named <image to sign>_cm4.hex. Script deletes it to avoid confusion.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I99381c33d68c2281cae2ac55cc482da7db5f78ac
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Update return type of tfm_platform_ns_wait_for_s_cpu_ready() to
int32_t on PSoC 6 platforms.
Change-Id: I7a569ea354e0ff6541ccf64a412af1865a1eee71
Signed-off-by: David Hu <david.hu@arm.com>
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Update SPE mailbox APIs to align with latest implementation on
master branch.
Update the APIs in PSoC 62 and PSoC 64.
Change-Id: Ib862488682ed2c37786c30364ca0fb1e93779947
Signed-off-by: David Hu <david.hu@arm.com>
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Update the post hardware init functions in Secure side and the
implementation on PSoC platforms, to align with those on master
branch.
Change-Id: I0f4c76e7156d9939651e301f610cec6edda29bf0
Signed-off-by: David Hu <david.hu@arm.com>
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Update NS post HW initialization and UART baudrate setting to align
with the latest implementation on master branch.
Change-Id: I90fbc56373ebeebe1c5ff07c343724aa447c0412
Signed-off-by: David Hu <david.hu@arm.com>
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Update the lock initialization, acquisition and release inside NS
PSA Client call interface, to align with the latest implementation
on master branch.
Change-Id: Icfd4da19d8c061e7566c31b9b882caf95f922840
Signed-off-by: David Hu <david.hu@arm.com>
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Update the NS mailbox APIs to prepare for merging PSoC platform
support to master branch.
Change-Id: I70469a557d8cc8e3fc78640688a365aabb3ea50f
Signed-off-by: David Hu <david.hu@arm.com>
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With older versions of Secure Flashboot (SFB), the CM0 is placed
into non-secure mode before TFM is run, and the registers are locked
down so that Cy_Prot_ConfigBusMaster() will cause a hard fault.
This change alters the SMPU setup to reflect that environment.
Protection Context (PC) is used to distinguish Secure from Non-secure,
while privileged/user is still used in the same manner.
We rely on SFB restricting the ability of the two cores to change their
PC.
Change-Id: I87d34a319f5c0b05831796ea3a113b3a54b61e1c
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Update the SMPU settings for the memory map of the 2MB PSoC64.
Change-Id: I30c73f26284698a05069485678b80a7200dc1ad7
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Flash layout:
* 0x1000_0000 Secure image primary (320 KB)
* 0x1005_0000 Non-secure image primary (1152 KB)
* 0x1017_0000 Secure image secondary (320 KB)
* 0x101c_0000 - 0x101f_ffff Reserved
* 0x101c_0000 Secure Storage Area (20 KB)
* 0x101c_5000 Internal Trusted Storage Area (16 KB)
* 0x101c_9000 NV counters area (512 B)
* 0x101c_9200 Scratch area (27.5 KB)
* 0x101d_0000 Reserved (192 KB)
* 0x101f_ffff End of Flash
RAM layout:
* 0x0800_0000 - 0x0802_FFFF Secure (192KB)
* 0x0800_0000 - 0x0800_FFFF Secure unprivileged data (S_UNPRIV_DATA_SIZE, 64KB)
* 0x0801_0000 - 0x0802_EFFF Secure priviliged data (S_PRIV_DATA_SIZE, 124KB)
* 0x0802_F000 - 0x0802_FFFF Secure priv code executable from RAM (S_RAM_CODE_SIZE, 4KB)
* 0x0803_0000 - 0x080E_7FFF Non-secure (736KB)
* 0x0803_0000 - 0x080E_6FFF Non-secure OS/App (732KB)
* 0x080E_7000 - 0x080E_7FFF Shared memory (NS_DATA_SHARED_SIZE, 4KB)
* 0x080E_8000 - 0x080F_FFFF System reserved memory (96KB)
* 0x0810_0000 End of RAM
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I74a6d002dfa953f8d17e0d9f8a5f32b44c881682
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The PSoC64 2MB has a different set of PPUs. Trying to configure
the ones from the 62 and 64 1M will cause compilation errors.
For now, we leave the PPUs as the boot code configures them.
Change-Id: I9e444adae6a441043072f19bcef06cb63b176c14
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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The 2MB PSoC 64 has different PPUs (described as v2 in the PDL).
For the programmable PPUs, we need the slave address and region
size.
Introduce #ifdefs so that we only get either the code for v1 PPUs
or the code for v2 PPUs, but not both.
Change-Id: I22935b00b0a5476880e9b066b0ef26b1e4e36de7
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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PSoC64 platforms do not use TF-M BL2 (mcuboot).
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I16b438778eb26c3d134636a0081d0a417d4dea6e
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- add psoc6_02 platform definitions
- add GCC and CLang startup files
- remove no longer needed DAP driver
- change the mailbox interrupt: NvicMux9 is not available
in psoc64 2MB part. Use NvicMux7 instead.
Signed-off-by: Andrei Narkevitch <aih@cypress.com>
Change-Id: Id1da7b1e77c9b6e040da616702f735efce158d03
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Added USART initialization as the original BSP misses it.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I5bbf895c04eb0952f70ebe458c50e7811e15d8a3
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BSP was cloned from Cypress TARGET_CY8CKIT-062S2-4343W repo,
tag: 1.0.0.7900
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I87b0e17b492b37202616ddc9d379900f20f1d28c
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Nest psoc62, psoc64 and psoc64_1m under "cypress" directory with
intention to put common code in a common shared directory later
(in a separate commit).
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: If1d9e285f76308a016b5bad349fddc1145390b5d
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This is in preparation for adding support for PSoC64 2MB board.
Note: copying entire directory "as is", thus creating many duplicating
files, with an intention to create a better platform tree separation
with common code support later.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: Ib10f39fa253192e8c8de89315ee306d5d9b1c947
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Platform name psoc64 is reserved for the default
PSoC64 part with 2MB Flash.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I995a6e9be8fcac6ac08707a434164bda2fec9396
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On PSoC 64, some of the PPUs are already configured by the time
TFM gets to run, so attempting to re-configure them will fail.
Don't try to configure those PPUs.
Change-Id: Idaf6a09c68f0f3d72fd44c70a1cc5149a22c057a
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Usage of board-specific configuration provided in
generated_source/cycfg_peripherals.c makes the driver more generic.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I2d134f61bf88758b00354752a3fecfb3105ff16d
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This was extremely useful when we were first getting TFM
up and running on the platform, but we're now at the point
where the non-debug build should be the default, and people
wanting the debug build should enable it themselves.
Change-Id: I1a0c3acd503704e644b2ec0be9ddd19adc88e074
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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cy_en_prot_status_t enumerals are specified as a bitmask, e.g.
CY_PROT_BAD_PARAM = CY_PROT_ID | CY_PDL_STATUS_ERROR | 0x01U
as such, they're much easier to interpret when printed in hex
than in decimal.
Signed-off-by: Chris Brand <chris.brand@cypress.com>
Change-Id: Ibc4c910df62b85e66d73749847e8f7b3bffeed96
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System-wide initialization needs to be placed in more generic
platform_init and bl2_platform_init functions.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I6735591c643dab56e5308dddd782c8353a277ab0
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In protect_unconfigured_smpus(), if all SMPUs are already
configured, ret would be returned without having been set.
Change-Id: I17f6ee19546cf3ab5b6ff47ddc984a0e94434613
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Modify the RAM layout and corresponding SMPU settings for PSoC64.
PSoC64 specific limits available RAM to 192KB (from 0x08000000 to
0x08030000) and requries allocating CM4 core RAM in the lower 64KB.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: If74b9b3141e765dd06f7f60b932340fbf9da13fd
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Add signing tools for CypressBootloader.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I74b7be1a916e1454bfb2e16e128df895f4cf7db7
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- Instead of TFM-customized mcuboot, at this moment psoc64 uses
Cypress version of it - CypressBootloader (CYBL). CYBL doesn't
populate BOOT_TFM_SHARED_DATA.
- as a temp workaround, mock mcuboot shared data to pass
initialization checks and attestation tests.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I535a11e1d439e0e05af9874054bf2fa6bb810e53
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As specified by the default security policy, CM4 core debug port
is disabled during the boot, but allowed to be enabled later after CM4
is up. Add an API to control DAP and enable CM4 debugging.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: Ica84ab545f04191c03e49dcc31eba61346737415
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Try to keep the code layout consistent:
- SMPU struct definition
- check for alignment constraint
- check region protected is correct
with any other checks based on a combination of SMPU structs after
all the used structs have been defined.
Change-Id: I05a5383ba51aa047c10d72a29bd2c0d300664ab7
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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It seems that the CM0+ on the PSoC64 board is currently set
to non-secure mode by default. Explictly set it to secure mode
before configuring the hardware isolation.
Change-Id: Ib6753d46f9e33fbb0e30e8996cbeeef6ae5046ad
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Modify the flash layout for PSoC64. This change modifies the psoc64
cmakefile such that a build with BL2=False will build for the PSoC64
target. The build with BL2=True is broken.
RAM layout and corresponding SMPU settings still need to be changed.
Change-Id: Ie80a6ca09edc9ffb0ca974f15868026ed8500f49
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Copied verbatim from PDL version 1.3.1.
Change-Id: I034b2c12890d5b48b043c160aca8a100f28e66e9
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Fixes these errors when building with -DBL2=False:
.../secure_fw/core/tfm_boot_data.c:54:41: error: use of undeclared identifier
'BOOT_TFM_SHARED_DATA_BASE'
boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE;
^
.../secure_fw/core/tfm_boot_data.c:123:41: error: use of undeclared identifier
'BOOT_TFM_SHARED_DATA_BASE'
boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE;
^
.../secure_fw/core/tfm_boot_data.c:124:15: error: use of undeclared identifier
'BOOT_TFM_SHARED_DATA_BASE'
tlv_end = BOOT_TFM_SHARED_DATA_BASE + boot_data->header.tlv_tot_len;
^
.../secure_fw/core/tfm_boot_data.c:125:15: error: use of undeclared identifier
'BOOT_TFM_SHARED_DATA_BASE'
offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE;
^
4 errors generated.
secure_fw/CMakeFiles/tfm_s_obj_lib.dir/build.make:446: recipe for target 'secure_fw/CMakeFiles/tfm_s_obj_lib.dir/core/tfm_boot_data.o' failed
Note that there are still other issues preventing the build from
completing, but those will be addressed in separate patches.
Change-Id: If2e9b977e684c7b4b9bb0dd7daa1068fab656299
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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In preparation for adding support for PSoC64, change which SMPU
structs are used.
Change-Id: Ic9f23b0f0f321bf9802541746602e72503416b95
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Re-apply changes from commit
43cee2b3aa01fbe3032cbc7af3d782c7f0e5500a
("plat: enable default IPC configuration (PSoC64)")
to the updated PDL code.
Change-Id: Ib30f62f35c45a4530df3f4828a4ad447441f0d61
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Re-apply the PDL changes from commit
142055ff18faa91fff25f18e54b2a3642880ae66
("plat: add shared memory region support (PSoC6)")
to the new PDL code.
Change-Id: Id58131280b26b3ce03129fa12c894cf6e446ad7d
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Re-apply patch 5f7810c1f9b2e28e3ff5c16ae5b966f4479cab18
("plat: replace .cy_ramfunc with .ram_func") to the new
version of the PDL files.
Signed-off-by: Chris Brand <chris.brand@cypress.com>
Change-Id: Ib48f8320e783eb4277a62add426fc09dbfd640cb
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Re-apply commit 4b1cd72acf3a180664497beedcef91907e11f487
("Platform: Fix the condition check during preprocessing in
SMPU on PSoC 6") to the new version of cy_prot.h.
Signed-off-by: Chris Brand <chris.brand@cypress.com>
Change-Id: If87c358cbbf1ac2f1f35dad0de3c34e7f1d83419
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Re-apply changes as needed from commit
0c937fa4968a83a3bcd4017c77df92a75f498ae1
("plat: PSoC6 platform modifications")
Change-Id: I1e05231ec39b8ed682c56a4b171402790275ed9d
Signed-off-by: Chris Brand <chris.brand@cypress.com>
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Note that this a verbatim copy of the PDL code.
As such, this patch effectively removes parts of the following
patches:
b901482dbf8b129a3adbe31c4e62432557fd1ba6
("plat: Tweak Cypress code for Arm Compiler version 6")
4b1cd72acf3a180664497beedcef91907e11f487
("Platform: Fix the condition check during preprocessing in
SMPU on PSoC 6")
5f7810c1f9b2e28e3ff5c16ae5b966f4479cab18
("plat: replace .cy_ramfunc with .ram_func")
142055ff18faa91fff25f18e54b2a3642880ae66
("plat: add shared memory region support (PSoC6)")
Later patches will re-apply those changes as needed.
Signed-off-by: Chris Brand <chris.brand@cypress.com>
Change-Id: Ic66de3161fce87f13f638a0f546fb35d77768aa9
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"Read while write" (RWW) improves flash driver performance
and enables flash driver notifications between two cores.
The latter is required to trigger an interrupt on CM4 side,
which handler is located in RAM, thus preventing the core
accessing flash memory during flash erase/program operations.
- add Cy_SysIpcPipeIsrCm0 interrupt handler to
CM0P interrupt vectors table
- add Cy_SysIpcPipeIsrCm4 and Cy_Flash_ResumeIrqHandler to
CM4 interrupt vectors table
- consider supporting vectors table relocation to RAM in order
to support run-time interrupt handlers registration - TBD
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I797be7334aef2b95c27b7aaa466380d7fb28f114
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"Read while write" (RWW) improves flash driver performance
and enables flash driver notifications between two cores.
The latter is required to trigger an interrupt on CM4 side,
which handler is located in RAM, thus preventing the core
accessing flash memory during flash erase/program operations.
- add Cy_SysIpcPipeIsrCm0 interrupt handler to
CM0P interrupt vectors table
- add Cy_SysIpcPipeIsrCm4 and Cy_Flash_ResumeIrqHandler to
CM4 interrupt vectors table
- consider supporting vectors table relocation to RAM in order
to support run-time interrupt handlers registration - TBD
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I36ac7a427ca8fb92fed1a765f10bc7a9e3ce29b4
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- update ARM CLang PSoC6 CM4 startup file with valid interrupt
handlers (copied from mbed-os CY8CKIT_062_WIFI_BT startup_psoc6_01_cm4.S
Git SHA: 101ae73b87e7082502915c5a4c6f3971fac270bb)
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I82509aa0b52aa66f43eaa74892a3bd48c87a5fb7
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- IPC is used for semaphores subsystem, mailbox and CY Flash driver.
Current implementation disables IPC initialization and configuration by
setting CY_IPC_DEFAULT_CFG_DISABLE build flag. While not using IPC
channels at the moment (RWW feature is disabled), Flash driver still relies
on semaphores. Currently semaphores are initialized in the mailbox code.
This patch enables default centralized IPC initialization in Cy_Platform_Init().
- By PDL design, Cy_Platform_Init is called from startup code. This creates
a problem that all initialized variables are wiped off when C code starts.
Proposed implementation adds optional call to a custom hw initialization function
that for PSoC6 platform eventialy ends in Cy_Platform_Init().
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I3b593ea9bec09d33bf6b49bbc885e266c8113930
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- IPC is used for semaphores subsystem, mailbox and CY Flash driver.
Current implementation disables IPC initialization and configuration by
setting CY_IPC_DEFAULT_CFG_DISABLE build flag. While not using IPC
channels at the moment (RWW feature is disabled), Flash driver still relies
on semaphores. Currently semaphores are initialized in the mailbox code.
This patch enables default centralized IPC initialization in Cy_Platform_Init().
- By PDL design, Cy_Platform_Init is called from startup code. This creates
a problem that all initialized variables are wiped off when C code starts.
Proposed implementation adds optional call to a custom hw initialization function
that for PSoC6 platform eventialy ends in Cy_Platform_Init().
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I13d83b67260c138df087ed63fa03535976ac73e7
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Adding tfm_ns_platform_init() function.
Contrarily to SystemInit() intended for a high priority hw initialization
(for example clock and power subsystems), and called on a very early boot
stage from startup code, this function is called from C code, hence variables
and other drivers data are protected from being cleared up by the C library
init.
This function can be used for initializing platform-specific hw resources
(e.g. IPC, UART) thus freeing up application main() function from the platform
details.
Implemented as a "weak" functions, it can be overwritten by a platform
specific implementation.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I2ffc4d40465fa40039523418fe08face065029c0
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Adding bl2_platform_init() function.
Contrarily to SystemInit() intended for a high priority hw initialization
(for example clock and power subsystems), and called on a very early boot
stage from startup code, this function is called from C code, hence variables
and other drivers data are protected from being cleared up by the C library
init.
This function can be used for initializing platform-specific hw resources
(e.g. IPC, UART) thus freeing up application main() function from the platform
details.
Implemented as a "weak" functions, it can be overwritten by a platform
specific implementation.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: Ia1e0e32c526bb1213ef9a32d04423221b51a3b7a
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Adding tfm_spm_hal_post_platform_init() function.
Contrarily to SystemInit() intended for a high priority hw initialization
(for example clock and power subsystems), and called on a very early boot
stage from startup code, this function is called from C code, hence variables
and other drivers data are protected from being cleared up by the C library
init.
This function can be used for initializing platform-specific hw resources
(e.g. IPC, UART) thus freeing up application main() function from the platform
details.
Implemented as a "weak" functions, it can be overwritten by a platform
specific implementation.
Signed-off-by: Andrei Narkevitch <ainh@cypress.com>
Change-Id: I46d453954177f15c3d925717880ed1aa81e0a7d6
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