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-rw-r--r--platform/ext/common/gcc/tfm_isolation_l3.ld.template459
1 files changed, 238 insertions, 221 deletions
diff --git a/platform/ext/common/gcc/tfm_isolation_l3.ld.template b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
index 493870eb25..5cccdd1302 100644
--- a/platform/ext/common/gcc/tfm_isolation_l3.ld.template
+++ b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
@@ -1,5 +1,7 @@
;/*
-; * Copyright (c) 2009-2021 Arm Limited
+; * Copyright (c) 2009-2024 Arm Limited
+; * Copyright (c) 2022-2023 Cypress Semiconductor Corporation (an Infineon company)
+; * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -17,118 +19,106 @@
; * This file is derivative of CMSIS V5.00 gcc_arm.ld
; */
-{{utilities.donotedit_warning}}
+/***********{{utilities.donotedit_warning}}***********/
/* Linker script to configure memory regions. */
/* This file will be run trough the pre-processor. */
#include "region_defs.h"
+/* Include file with definitions for section alignments.
+ * Note: it should be included after region_defs.h to let platform define
+ * default values if needed. */
+#include "tfm_s_linker_alignments.h"
+
MEMORY
{
FLASH (rx) : ORIGIN = S_CODE_START, LENGTH = S_CODE_SIZE
- RAM (rwx) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE
-#if defined(S_CODE_SRAM_ALIAS_BASE)
- CODE_RAM (rwx) : ORIGIN = S_CODE_SRAM_ALIAS_BASE, LENGTH = TOTAL_CODE_SRAM_SIZE
+ RAM (rw) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE
+#if defined(S_RAM_CODE_START)
+ CODE_RAM (rwx) : ORIGIN = S_RAM_CODE_START, LENGTH = S_RAM_CODE_SIZE
#endif
- VENEERS (rx) : ORIGIN = CMSE_VENEER_REGION_START, LENGTH = CMSE_VENEER_REGION_SIZE
}
-__heap_size__ = S_HEAP_SIZE;
-__psp_stack_size__ = S_PSP_STACK_SIZE;
-__msp_init_stack_size__ = S_MSP_STACK_SIZE_INIT;
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a libc_nano.a)
+__msp_stack_size__ = S_MSP_STACK_SIZE;
ENTRY(Reset_Handler)
SECTIONS
{
+ /* Start address of the code. */
+ Image$$PT_RO_START$$Base = ADDR(.TFM_VECTORS);
+
.TFM_VECTORS : ALIGN(4)
{
__vectors_start__ = .;
KEEP(*(.vectors))
__vectors_end__ = .;
- *startup*(.text*)
. = ALIGN(4);
} > FLASH
- .copy.table : ALIGN(4)
+ ASSERT(__vectors_start__ != __vectors_end__, ".vectors should not be empty")
+
+#ifdef CONFIG_TFM_USE_TRUSTZONE
+ ASSERT(. <= ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE, ".TFM_VECTORS section size overflow.")
+ . = ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE;
+ /*
+ * Place the CMSE Veneers (containing the SG instruction) after the code, in
+ * a separate at least 32 bytes aligned region so that the SAU can
+ * programmed to just set this region as Non-Secure Callable.
+ */
+ .gnu.sgstubs ALIGN(TFM_LINKER_VENEERS_ALIGNMENT) :
{
- __copy_table_start__ = .;
- LONG (LOADADDR(.TFM_DATA))
- LONG (ADDR(.TFM_DATA))
- LONG (SIZEOF(.TFM_DATA))
-{% for partition in partitions %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
- LONG (LOADADDR(.ER_{{partition.manifest.name}}_RWZI))
- LONG (ADDR(.ER_{{partition.manifest.name}}_RWZI))
- LONG (SIZEOF(.ER_{{partition.manifest.name}}_RWZI))
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
-{% endfor %}
-#if defined(S_CODE_SRAM_ALIAS_BASE)
- LONG (LOADADDR(.ER_EFLASH_DRIVER_RO))
- LONG (ADDR(.ER_EFLASH_DRIVER_RO))
- LONG (SIZEOF(.ER_EFLASH_DRIVER_RO))
-#endif
- __copy_table_end__ = .;
+ *(.gnu.sgstubs*)
} > FLASH
+ Image$$ER_VENEER$$Base = ADDR(.gnu.sgstubs);
+ Image$$VENEER_ALIGN$$Limit = ALIGN(TFM_LINKER_VENEERS_ALIGNMENT);
+
+ /* GCC always places veneers at the end of .gnu.sgstubs section, so the only
+ * way to align the end of .gnu.sgstubs section is to align start of the
+ * next section */
- .zero.table : ALIGN(4)
+ /**** Section for holding partition RO load data */
+ /*
+ * Sort the partition info by priority to guarantee the initing order.
+ * The first loaded partition will be inited at last in SFN model.
+ */
+ .TFM_SP_LOAD_LIST ALIGN(TFM_LINKER_VENEERS_ALIGNMENT) :
+#else
+ .TFM_SP_LOAD_LIST ALIGN(4) :
+#endif
{
- __zero_table_start__ = .;
- LONG (ADDR(.TFM_BSS))
- LONG (SIZEOF(.TFM_BSS))
-{% for partition in partitions %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
- LONG (ADDR(.{{partition.manifest.name}}_RWZI_BSS))
- LONG (SIZEOF(.{{partition.manifest.name}}_RWZI_BSS))
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
-{% endfor %}
- __zero_table_end__ = .;
+ KEEP(*(.part_load_priority_00))
+ KEEP(*(.part_load_priority_01))
+ KEEP(*(.part_load_priority_02))
+ KEEP(*(.part_load_priority_03))
} > FLASH
-
- /* Position tag */
- . = ALIGN(32);
- Image$$PT_RO_START$$Base = .;
+ Image$$TFM_SP_LOAD_LIST$$RO$$Base = ADDR(.TFM_SP_LOAD_LIST);
+ Image$$TFM_SP_LOAD_LIST$$RO$$Limit = ADDR(.TFM_SP_LOAD_LIST) + SIZEOF(.TFM_SP_LOAD_LIST);
/**** PSA RoT RO CODE + RO-data starts here */
+ . = ALIGN(TFM_LINKER_PSA_ROT_LINKER_CODE_ALIGNMENT);
{% for partition in partitions %}
{% if partition.manifest.type == 'PSA-ROT' %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
- .{{partition.manifest.name}}_RO : ALIGN(32)
+ .{{partition.manifest.name}}_RO ALIGN(TFM_LINKER_PSA_ROT_LINKER_CODE_ALIGNMENT) :
{
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
+ {{pattern}}:(SORT_BY_ALIGNMENT(.text*))
+ {{pattern}}:(SORT_BY_ALIGNMENT(.rodata*))
{% endfor %}
{% endif %}
{% if partition.attr.linker_pattern.object_list %}
{% for pattern in partition.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}:*(.rodata*)
+ {{pattern}}(SORT_BY_ALIGNMENT(.text*))
+ {{pattern}}:(SORT_BY_ALIGNMENT(.rodata*))
{% endfor %}
{% endif %}
*({{partition.manifest.name}}_PSA-ROT_ATTR_FN)
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PSA_ROT_LINKER_CODE_ALIGNMENT);
} > FLASH
Image$${{partition.manifest.name}}_RO$$Base = ADDR(.{{partition.manifest.name}}_RO);
Image$${{partition.manifest.name}}_RO$$Limit = ADDR(.{{partition.manifest.name}}_RO) + SIZEOF(.{{partition.manifest.name}}_RO);
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
{% endif %}
{% endfor %}
@@ -137,63 +127,105 @@ SECTIONS
/**** APPLICATION RoT RO CODE + data starts here */
{% for partition in partitions %}
{% if partition.manifest.type == 'APPLICATION-ROT' %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
- .{{partition.manifest.name}}_RO : ALIGN(32)
+ .{{partition.manifest.name}}_RO ALIGN(TFM_LINKER_APP_ROT_LINKER_CODE_ALIGNMENT) :
{
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
+ {{pattern}}:(SORT_BY_ALIGNMENT(.text*))
+ {{pattern}}:(SORT_BY_ALIGNMENT(.rodata*))
{% endfor %}
{% endif %}
{% if partition.attr.linker_pattern.object_list %}
{% for pattern in partition.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}:*(.rodata*)
+ {{pattern}}(SORT_BY_ALIGNMENT(.text*))
+ {{pattern}}:(SORT_BY_ALIGNMENT(.rodata*))
{% endfor %}
{% endif %}
*({{partition.manifest.name}}_APP-ROT_ATTR_FN)
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_APP_ROT_LINKER_CODE_ALIGNMENT);
} > FLASH
Image$${{partition.manifest.name}}_CODE$$Base = ADDR(.{{partition.manifest.name}}_RO);
Image$${{partition.manifest.name}}_CODE$$Limit = ADDR(.{{partition.manifest.name}}_RO) + SIZEOF(.{{partition.manifest.name}}_RO);
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
{% endif %}
{% endfor %}
/**** APPLICATION RoT RO CODE + data ends here */
- /**** Unprivileged Secure code starts here */
- .ER_UNPRIV_CODE : ALIGN(32)
+#if defined(S_RAM_CODE_START)
+ /* Flash drivers code that gets copied from Flash */
+ .ER_CODE_SRAM ALIGN(S_RAM_CODE_START, 4) :
{
- *(SFN)
- *armlib*:*(.text*)
- *armlib*:*(.rodata*)
- *libtfm_sprt*:*(.text*)
- *libtfm_sprt*:*(.rodata*)
- *psa_client.*(.text*) /* NXP */
- *psa_client.*(.rodata*)
- *psa_service.*(.text*) /* NXP */
- *psa_service.*(.rodata*)
- *psa_lifecycle.*(.text*) /* NXP */
- *psa_lifecycle.*(.rodata*)
- . = ALIGN(32);
- } > FLASH
- Image$$TFM_UNPRIV_CODE$$RO$$Base = ADDR(.ER_UNPRIV_CODE);
- Image$$TFM_UNPRIV_CODE$$RO$$Limit = ADDR(.ER_UNPRIV_CODE) + SIZEOF(.ER_UNPRIV_CODE);
+ *libflash_drivers*:(SORT_BY_ALIGNMENT(.text*))
+ *libflash_drivers*:(SORT_BY_ALIGNMENT(.rodata*))
+ KEEP(*(.ramfunc))
+ . = ALIGN(4); /* This alignment is needed to make the section size 4 bytes aligned */
+ } > CODE_RAM AT > FLASH
+ Image$$ER_CODE_SRAM$$Base = ADDR(.ER_CODE_SRAM);
+ Image$$ER_CODE_SRAM$$Limit = ADDR(.ER_CODE_SRAM) + SIZEOF(.ER_CODE_SRAM);
+#endif
.ER_TFM_CODE : ALIGN(4)
{
- *(.text*)
+ /* .copy.table */
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+#ifdef RAM_VECTORS_SUPPORT
+ /* Copy interrupt vectors from flash to RAM */
+ LONG (__vectors_start__) /* From */
+ LONG (__ram_vectors_start__) /* To */
+ LONG ((__vectors_end__ - __vectors_start__) / 4) /* Size */
+#endif
+ LONG (LOADADDR(.spm_data))
+ LONG (ADDR(.spm_data))
+ LONG (SIZEOF(.spm_data) / 4)
+ LONG (LOADADDR(.TFM_DATA))
+ LONG (ADDR(.TFM_DATA))
+ LONG (SIZEOF(.TFM_DATA) / 4)
+{% for partition in partitions %}
+ LONG (LOADADDR(.ER_{{partition.manifest.name}}_RWZI))
+ LONG (ADDR(.ER_{{partition.manifest.name}}_RWZI))
+ LONG (SIZEOF(.ER_{{partition.manifest.name}}_RWZI) / 4)
+{% endfor %}
+#if defined(S_RAM_CODE_START)
+ LONG (LOADADDR(.ER_CODE_SRAM))
+ LONG (ADDR(.ER_CODE_SRAM))
+ LONG (SIZEOF(.ER_CODE_SRAM) / 4)
+#endif
+ __copy_table_end__ = .;
+
+ /* .zero.table */
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (ADDR(.spm_bss))
+ LONG (SIZEOF(.spm_bss) / 4)
+#if defined(CONFIG_TFM_PARTITION_META)
+ LONG (ADDR(.TFM_SP_META_PTR))
+ LONG (SIZEOF(.TFM_SP_META_PTR) / 4)
+#endif
+ LONG (ADDR(.TFM_BSS))
+ LONG (SIZEOF(.TFM_BSS) / 4)
+{% for partition in partitions %}
+ LONG (ADDR(.{{partition.manifest.name}}_RWZI_BSS))
+ LONG (SIZEOF(.{{partition.manifest.name}}_RWZI_BSS) / 4)
+{% endfor %}
+ __zero_table_end__ = .;
+
+ *startup*(.text*)
+ *libplatform_s*:(SORT_BY_ALIGNMENT(.text*))
+ *libtfm_spm*:(SORT_BY_ALIGNMENT(.text*))
+
+ *libplatform_s*:(SORT_BY_ALIGNMENT(.rodata*))
+ *libtfm_spm*:(SORT_BY_ALIGNMENT(.rodata*))
+ } > FLASH
+
+ /**** Unprivileged Secure code starts here */
+ .ER_UNPRIV_CODE ALIGN(TFM_LINKER_UNPRIV_CODE_ALIGNMENT) :
+ {
+ *(SORT_BY_ALIGNMENT(.text*))
KEEP(*(.init))
KEEP(*(.fini))
-
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
@@ -208,30 +240,19 @@ SECTIONS
*(SORT(.dtors.*))
*(.dtors)
- *(.rodata*)
+ *(SORT_BY_ALIGNMENT(.rodata*))
KEEP(*(.eh_frame*))
+
+ . = ALIGN(TFM_LINKER_UNPRIV_CODE_ALIGNMENT);
} > FLASH
+ Image$$TFM_UNPRIV_CODE_START$$RO$$Base = ADDR(.ER_UNPRIV_CODE);
+ Image$$TFM_UNPRIV_CODE_END$$RO$$Limit = ADDR(.ER_UNPRIV_CODE) + SIZEOF(.ER_UNPRIV_CODE);
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PT_RO_ALIGNMENT);
Image$$PT_RO_END$$Base = .;
-#if defined(S_CODE_SRAM_ALIAS_BASE)
- .ER_EFLASH_DRIVER_RO : ALIGN(4)
- {
- *Driver_GFC100_EFlash.o(.text*)
- *Driver_GFC100_EFlash.o(.rodata*)
- *gfc100_eflash_drv.o(.text*)
- *gfc100_eflash_drv.o(.rodata*)
- *musca_b1_eflash_drv.o(.text*)
- *musca_b1_eflash_drv.o(.rodata*)
- . = ALIGN(4); /* This alignment is needed to make the section size 4 bytes aligned */
- } > CODE_RAM AT > FLASH
- Image$$ER_EFLASH_DRIVER_RO$$Base = ADDR(.ER_EFLASH_DRIVER_RO);
- Image$$ER_EFLASH_DRIVER_RO$$Limit = ADDR(.ER_EFLASH_DRIVER_RO) + SIZEOF(.ER_EFLASH_DRIVER_RO);
-#endif
-
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
@@ -247,64 +268,90 @@ SECTIONS
/**** Base address of secure data area */
.tfm_secure_data_start :
{
- . = ABSOLUTE(S_DATA_START) ;
+ /* Relocate current position to RAM */
+ . = ALIGN(4);
} > RAM
- /* Position tag */
- . = ALIGN(32);
+ /* Position tag */
+ . = ALIGN(TFM_LINKER_PT_PRIV_RWZI_ALIGNMENT);
Image$$PT_PRIV_RWZI_START$$Base = .;
/* shared_data and msp_stack are overlapping on purpose when
* msp_stack is extended until the beginning of RAM, when shared_date
* was read out by partitions
*/
- .tfm_bl2_shared_data : ALIGN(32)
+ .tfm_bl2_shared_data ALIGN(TFM_LINKER_BL2_SHARED_DATA_ALIGNMENT) :
{
. += BOOT_TFM_SHARED_DATA_SIZE;
} > RAM
- .msp_stack : ALIGN(32)
+ .msp_stack ALIGN(TFM_LINKER_MSP_STACK_ALIGNMENT) :
+ {
+ . += __msp_stack_size__ - 0x8;
+ } > RAM
+ Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack);
+ Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack);
+
+ .msp_stack_seal_res :
{
- . += __msp_init_stack_size__;
+ . += 0x8;
+ } > RAM
+ __StackSeal = ADDR(.msp_stack_seal_res);
+
+#if defined(ENABLE_HEAP)
+ __heap_size__ = S_HEAP_SIZE;
+ .heap ALIGN(8) :
+ {
+ __end__ = .;
+ PROVIDE(end = .);
+ __HeapBase = .;
+ . += __heap_size__;
+ __HeapLimit = .;
+ __heap_limit = .; /* Add for _sbrk */
} > RAM
- Image$$ARM_LIB_STACK_MSP$$ZI$$Base = ADDR(.msp_stack);
- Image$$ARM_LIB_STACK_MSP$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack);
+#endif
+
+ .spm_data :
+ {
+ *libtfm_spm*:*(.data*);
+ } > RAM AT> FLASH
+ .spm_bss (NOLOAD):
+ {
+ *libtfm_spm*:(SORT_BY_ALIGNMENT(.bss*));
+ } > RAM AT> RAM
/**** PSA RoT DATA start here */
{% for partition in partitions %}
{% if partition.manifest.type == 'PSA-ROT' %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PSA_ROT_LINKER_DATA_ALIGNMENT);
Image$$PT_{{partition.manifest.name}}_PRIVATE_DATA_START$$Base = .;
- .ER_{{partition.manifest.name}}_RWZI : ALIGN(32)
+ .ER_{{partition.manifest.name}}_RWZI ALIGN(TFM_LINKER_PSA_ROT_LINKER_DATA_ALIGNMENT) :
{
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
- {{pattern}}:*(.data*)
+ {{pattern}}:(SORT_BY_ALIGNMENT(.data*))
{% endfor %}
{% endif %}
{% if partition.attr.linker_pattern.object_list %}
{% for pattern in partition.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
+ {{pattern}}(SORT_BY_ALIGNMENT(.data*))
{% endfor %}
{% endif %}
*({{partition.manifest.name}}_PSA-ROT_ATTR_RW)
- . = ALIGN(32);
+ . = ALIGN(4);
} > RAM AT> FLASH
Image$$ER_{{partition.manifest.name}}_RWZI$$RW$$Base = ADDR(.ER_{{partition.manifest.name}}_RWZI);
Image$$ER_{{partition.manifest.name}}_RWZI$$RW$$Limit = ADDR(.ER_{{partition.manifest.name}}_RWZI) + SIZEOF(.ER_{{partition.manifest.name}}_RWZI);
- .{{partition.manifest.name}}_RWZI_BSS : ALIGN(32)
+ .{{partition.manifest.name}}_RWZI_BSS ALIGN(4) (NOLOAD):
{
start_of_{{partition.manifest.name}}_RWZI = .;
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
+ {{pattern}}:(SORT_BY_ALIGNMENT(.bss*))
{{pattern}}:*(COMMON)
{% endfor %}
{% endif %}
@@ -316,47 +363,31 @@ SECTIONS
{% endif %}
*({{partition.manifest.name}}_PSA-ROT_ATTR_ZI)
. += (. - start_of_{{partition.manifest.name}}_RWZI) ? 0 : 4;
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PSA_ROT_LINKER_DATA_ALIGNMENT);
} > RAM AT> RAM
Image$$ER_{{partition.manifest.name}}_RWZI$$ZI$$Base = ADDR(.{{partition.manifest.name}}_RWZI_BSS);
Image$$ER_{{partition.manifest.name}}_RWZI$$ZI$$Limit = ADDR(.{{partition.manifest.name}}_RWZI_BSS) + SIZEOF(.{{partition.manifest.name}}_RWZI_BSS);
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PSA_ROT_LINKER_DATA_ALIGNMENT);
Image$$PT_{{partition.manifest.name}}_PRIVATE_DATA_END$$Base = .;
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
-
{% endif %}
{% endfor %}
/**** PSA RoT DATA end here */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_PT_PRIV_RWZI_ALIGNMENT);
/* Position tag */
Image$$PT_PRIV_RWZI_END$$Base = .;
- /* PSP is unprivileged in single-core topology */
- .psp_stack : ALIGN(32)
- {
- . += (__psp_stack_size__);
- } > RAM
- Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.psp_stack);
- Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.psp_stack) + SIZEOF(.psp_stack);
-
/**** APPLICATION RoT DATA start here */
{% for partition in partitions %}
{% if partition.manifest.type == 'APPLICATION-ROT' %}
- {% if partition.attr.conditional %}
-#ifdef {{partition.attr.conditional}}
- {% endif %}
-
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT);
Image$$PT_{{partition.manifest.name}}_PRIVATE_DATA_START$$Base = .;
- .ER_{{partition.manifest.name}}_RWZI : ALIGN(32)
+ .ER_{{partition.manifest.name}}_RWZI ALIGN(TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT) :
{
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
@@ -365,97 +396,63 @@ SECTIONS
{% endif %}
{% if partition.attr.linker_pattern.object_list %}
{% for pattern in partition.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
+ {{pattern}}(SORT_BY_ALIGNMENT(.data*))
{% endfor %}
{% endif %}
*({{partition.manifest.name}}_APP-ROT_ATTR_RW)
- . = ALIGN(32);
+ . = ALIGN(4);
} > RAM AT> FLASH
Image$$.ER_{{partition.manifest.name}}_RWZI$$RW$$Base = ADDR(.ER_{{partition.manifest.name}}_RWZI);
Image$$.ER_{{partition.manifest.name}}_RWZI$$RW$$Limit = ADDR(.ER_{{partition.manifest.name}}_RWZI) + SIZEOF(.ER_{{partition.manifest.name}}_RWZI);
- .{{partition.manifest.name}}_RWZI_BSS : ALIGN(32)
+ .{{partition.manifest.name}}_RWZI_BSS ALIGN(4) (NOLOAD):
{
start_of_{{partition.manifest.name}}_RWZI = .;
{% if partition.attr.linker_pattern.library_list %}
{% for pattern in partition.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
+ {{pattern}}:(SORT_BY_ALIGNMENT(.bss*))
{{pattern}}:*(COMMON)
{% endfor %}
{% endif %}
{% if partition.attr.linker_pattern.object_list %}
{% for pattern in partition.attr.linker_pattern.object_list %}
- {{pattern}}(.bss*)
+ {{pattern}}(SORT_BY_ALIGNMENT(.bss*))
{{pattern}}(COMMON)
{% endfor %}
{% endif %}
*({{partition.manifest.name}}_APP-ROT_ATTR_ZI)
. += (. - start_of_{{partition.manifest.name}}_RWZI) ? 0 : 4;
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT);
} > RAM AT> RAM
Image$$ER_{{partition.manifest.name}}_RWZI$$ZI$$Base = ADDR(.{{partition.manifest.name}}_RWZI_BSS);
Image$$ER_{{partition.manifest.name}}_RWZI$$ZI$$Limit = ADDR(.{{partition.manifest.name}}_RWZI_BSS) + SIZEOF(.{{partition.manifest.name}}_RWZI_BSS);
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT);
Image$$PT_{{partition.manifest.name}}_PRIVATE_DATA_END$$Base = .;
- {% if partition.attr.conditional %}
-#endif /* {{partition.attr.conditional}} */
- {% endif %}
-
{% endif %}
{% endfor %}
/**** APPLICATION RoT DATA end here */
/* Position tag */
- . = ALIGN(32);
+ . = ALIGN(TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT);
Image$$PT_APP_RWZI_END$$Base = .;
-#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
- .TFM_SP_SECURE_TEST_PARTITION_LINKER_DATA : ALIGN(32)
- {
- *libc_nano*:*(.data*)
- . = ALIGN(32);
- } > RAM AT> FLASH
-
- .TFM_SP_SECURE_TEST_PARTITION_LINKER_BSS : ALIGN(32)
- {
- /* FixMe:
- * Test framework use printf to print out test result. Implementation of
- * printf in GCC libc use static data and heap as well. To be able to
- * execute test suites with TFM_LVL=3 this workaround is needed to
- * allocate libc static data and heap within the data section of secure
- * test partition. This can be removed if test service will be executed
- * in privileged mode.
- */
- *libc_nano*:*(.bss*)
- *libc_nano*:*(COMMON)
-
- __end__ = .;
- PROVIDE(end = .);
- __HeapBase = .;
- . += __heap_size__;
- __HeapLimit = .;
- __heap_limit = .; /* Add for _sbrk */
-
- . = ALIGN(32);
- } > RAM AT> RAM
-#else /* TFM_PARTITION_TEST_SECURE_SERVICES */
- .heap : ALIGN(8)
+#ifdef RAM_VECTORS_SUPPORT
+ .ramVectors ALIGN(TFM_LINKER_RAM_VECTORS_ALIGNMENT) (NOLOAD) :
{
- __end__ = .;
- PROVIDE(end = .);
- __HeapBase = .;
- . += __heap_size__;
- __HeapLimit = .;
- __heap_limit = .; /* Add for _sbrk */
- } > RAM AT> RAM
-#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
+ __ram_vectors_start__ = .;
+ KEEP(*(.ram_vectors))
+ __ram_vectors_end__ = .;
+ } > RAM
+ .TFM_DATA __ram_vectors_end__ :
+#else
- .TFM_DATA : ALIGN(4)
+ .TFM_DATA ALIGN(4) :
+#endif
{
- *(.data*)
+ *(SORT_BY_ALIGNMENT(.data*))
. = ALIGN(4);
/* preinit data */
@@ -484,33 +481,53 @@ SECTIONS
Image$$ER_TFM_DATA$$RW$$Base = ADDR(.TFM_DATA);
Image$$ER_TFM_DATA$$RW$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA);
- .TFM_BSS : ALIGN(4)
+#if defined(CONFIG_TFM_PARTITION_META)
+ .TFM_SP_META_PTR ALIGN(TFM_LINKER_SP_META_PTR_ALIGNMENT) :
+ {
+ *(.bss.SP_META_PTR_SPRTL_INST)
+ . = ALIGN(TFM_LINKER_SP_META_PTR_ALIGNMENT);
+ } > RAM AT> RAM
+ Image$$TFM_SP_META_PTR$$ZI$$Base = ADDR(.TFM_SP_META_PTR);
+ Image$$TFM_SP_META_PTR$$ZI$$Limit = ADDR(.TFM_SP_META_PTR) + SIZEOF(.TFM_SP_META_PTR);
+ /* This is needed for the uniform configuration of MPU region. */
+ Image$$TFM_SP_META_PTR_END$$ZI$$Limit = Image$$TFM_SP_META_PTR$$ZI$$Limit;
+#endif
+
+ .TFM_BSS ALIGN(4) (NOLOAD):
{
__bss_start__ = .;
- *(.bss*)
+
+ /* The runtime partition placed order is same as load partition */
+ __partition_runtime_start__ = .;
+ KEEP(*(.bss.part_runtime_priority_00))
+ KEEP(*(.bss.part_runtime_priority_01))
+ KEEP(*(.bss.part_runtime_priority_02))
+ KEEP(*(.bss.part_runtime_priority_03))
+ __partition_runtime_end__ = .;
+ . = ALIGN(4);
+
+ /* The runtime service placed order is same as load partition */
+ __service_runtime_start__ = .;
+ KEEP(*(.bss.serv_runtime_priority_00))
+ KEEP(*(.bss.serv_runtime_priority_01))
+ KEEP(*(.bss.serv_runtime_priority_02))
+ KEEP(*(.bss.serv_runtime_priority_03))
+ __service_runtime_end__ = .;
+ *(SORT_BY_ALIGNMENT(.bss*))
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM AT> RAM
Image$$ER_TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS);
Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS);
+ Image$$ER_PART_RT_POOL$$ZI$$Base = __partition_runtime_start__;
+ Image$$ER_PART_RT_POOL$$ZI$$Limit = __partition_runtime_end__;
+ Image$$ER_SERV_RT_POOL$$ZI$$Base = __service_runtime_start__;
+ Image$$ER_SERV_RT_POOL$$ZI$$Limit = __service_runtime_end__;
Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA);
Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS);
- /*
- * Place the CMSE Veneers (containing the SG instruction) after the code, in a
- * separate 32 bytes aligned region so that the SAU can programmed to just set
- * this region as Non-Secure Callable.
- */
- .gnu.sgstubs : ALIGN(32)
- {
- *(.gnu.sgstubs*)
- . = ALIGN(32);
- } > VENEERS AT> VENEERS
- Load$$LR$$LR_VENEER$$Base = ADDR(.gnu.sgstubs);
- Load$$LR$$LR_VENEER$$Limit = ADDR(.gnu.sgstubs) + SIZEOF(.gnu.sgstubs);
-
Load$$LR$$LR_NS_PARTITION$$Base = NS_PARTITION_START;
#ifdef BL2