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-rw-r--r--cmake/Common/CompilerIarArm850.cmake6
-rw-r--r--platform/ext/cmsis/cmsis_iccarm.h15
-rw-r--r--platform/ext/fvp_sse300_mps2.cmake12
-rw-r--r--platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_bl2.icf57
-rw-r--r--platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_ns.icf55
-rw-r--r--platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_ns.c5
-rw-r--r--platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_s.c5
-rw-r--r--platform/ext/target/mps2/fvp_sse300/target_cfg.h2
8 files changed, 143 insertions, 14 deletions
diff --git a/cmake/Common/CompilerIarArm850.cmake b/cmake/Common/CompilerIarArm850.cmake
index dfa9a36d82..e68568d915 100644
--- a/cmake/Common/CompilerIarArm850.cmake
+++ b/cmake/Common/CompilerIarArm850.cmake
@@ -25,6 +25,12 @@ elseif(${ARM_CPU_ARCHITECTURE} STREQUAL "ARMv8-M.MAIN")
string_append_unique_item(STRING CMAKE_CXX_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
string_append_unique_item(STRING CMAKE_CXX_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
string_append_unique_item(STRING CMAKE_LINK_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
+elseif(${ARM_CPU_ARCHITECTURE} STREQUAL "ARMv8.1-M.MAIN")
+# Treat v8.1-m as v8-m until we get full v8.1-m/Cortex-M55 support in iccarm
+ string_append_unique_item(STRING CMAKE_C_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
+ string_append_unique_item(STRING CMAKE_CXX_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
+ string_append_unique_item(STRING CMAKE_CXX_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
+ string_append_unique_item(STRING CMAKE_LINK_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M33.no_dsp")
elseif(${ARM_CPU_ARCHITECTURE} STREQUAL "ARMv7-M")
string_append_unique_item(STRING CMAKE_C_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M4")
string_append_unique_item(STRING CMAKE_CXX_FLAGS_CPU KEY "--cpu" VAL "--cpu Cortex-M4")
diff --git a/platform/ext/cmsis/cmsis_iccarm.h b/platform/ext/cmsis/cmsis_iccarm.h
index 4020ad76e7..0627a1572a 100644
--- a/platform/ext/cmsis/cmsis_iccarm.h
+++ b/platform/ext/cmsis/cmsis_iccarm.h
@@ -7,8 +7,8 @@
//------------------------------------------------------------------------------
//
-// Copyright (c) 2017-2019 IAR Systems
-// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
+// Copyright (c) 2017-2020 IAR Systems
+// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License")
// you may not use this file except in compliance with the License.
@@ -236,12 +236,11 @@ __packed struct __iar_u32 { uint32_t v; };
#endif
#endif
-#ifndef __WEAK
- #if __ICCARM_V8
- #define __WEAK __attribute__((weak))
- #else
- #define __WEAK _Pragma("__weak")
- #endif
+#undef __WEAK /* undo the definition from DLib_Defaults.h */
+#if __ICCARM_V8
+ #define __WEAK __attribute__((weak))
+#else
+ #define __WEAK _Pragma("__weak")
#endif
#ifndef __PROGRAM_START
diff --git a/platform/ext/fvp_sse300_mps2.cmake b/platform/ext/fvp_sse300_mps2.cmake
index 83d87ff09d..9a9030e388 100644
--- a/platform/ext/fvp_sse300_mps2.cmake
+++ b/platform/ext/fvp_sse300_mps2.cmake
@@ -27,7 +27,13 @@ if(COMPILER STREQUAL "ARMCLANG")
elseif(COMPILER STREQUAL "GNUARM")
message(FATAL_ERROR "No GNUARM support yet for target '${TARGET_PLATFORM}'.")
elseif(COMPILER STREQUAL "IARARM")
- message(FATAL_ERROR "No IARARM support yet for target '${TARGET_PLATFORM}'.")
+ set (S_SCATTER_FILE_NAME "${PLATFORM_DIR}/common/iar/tfm_common_s.icf")
+ set (BL2_SCATTER_FILE_NAME "${FVP_SSE300_DIR}/device/source/iar/fvp_sse300_mps2_bl2.icf")
+ set (NS_SCATTER_FILE_NAME "${FVP_SSE300_DIR}/device/source/iar/fvp_sse300_mps2_ns.icf")
+ if (DEFINED CMSIS_DIR)
+ # not all project defines CMSIS_DIR, only the ones that use it.
+ set (RTX_LIB_PATH "${CMSIS_DIR}/RTOS2/RTX/Library/IAR/RTX_V8MMN.a")
+ endif()
else()
message(FATAL_ERROR "Invalid compiler specified: '${COMPILER}'.")
endif()
@@ -112,6 +118,10 @@ elseif(BUILD_STARTUP)
list(APPEND ALL_SRC_C_BL2 "${FVP_SSE300_DIR}/device/source/startup_fvp_sse300_mps2_bl2.c")
elseif(CMAKE_C_COMPILER_ID STREQUAL "GNUARM")
message(FATAL_ERROR "No GNUARM support yet for target '${TARGET_PLATFORM}'.")
+ elseif(COMPILER STREQUAL "IARARM")
+ list(APPEND ALL_SRC_C_S "${FVP_SSE300_DIR}/device/source/startup_fvp_sse300_mps2_s.c")
+ list(APPEND ALL_SRC_C_NS "${FVP_SSE300_DIR}/device/source/startup_fvp_sse300_mps2_ns.c")
+ list(APPEND ALL_SRC_C_BL2 "${FVP_SSE300_DIR}/device/source/startup_fvp_sse300_mps2_bl2.c")
else()
message(FATAL_ERROR "No startup file is available for compiler '${CMAKE_C_COMPILER_ID}'.")
endif()
diff --git a/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_bl2.icf b/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_bl2.icf
new file mode 100644
index 0000000000..05c2c8364b
--- /dev/null
+++ b/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_bl2.icf
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2020 Arm Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ *
+ * This file is derivative of ../armclang/mps2_an519_bl2.sct
+ */
+
+/* Linker script to configure memory regions. */
+/* This file will be run trough the pre-processor. */
+
+#include "region_defs.h"
+
+do not initialize { section .noinit };
+initialize by copy { readwrite };
+
+define block ER_CODE with fixed order, alignment = 8 {
+ section .intvec,
+ readonly
+ };
+define block LR_CODE with fixed order, maximum size = BL2_DATA_SIZE {block ER_CODE};
+place at address BL2_CODE_START {block LR_CODE};
+
+define block TFM_SHARED_DATA with alignment = 32, size = BOOT_TFM_SHARED_DATA_SIZE { };
+define block ER_DATA with alignment = 32 {readwrite};
+define block ARM_LIB_STACK with alignment = 32, size = BL2_MSP_STACK_SIZE { };
+define block HEAP with alignment = 8, size = BL2_HEAP_SIZE { };
+define block ARM_LIB_HEAP with alignment = 8, size = BL2_HEAP_SIZE { };
+define overlay HEAP_OVL {block HEAP};
+define overlay HEAP_OVL {block ARM_LIB_HEAP};
+keep {block TFM_SHARED_DATA, block ER_DATA, block ARM_LIB_STACK,
+ block HEAP, block ARM_LIB_HEAP};
+
+if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
+{
+ // Required in a multi-threaded application
+ initialize by copy with packing = none { section __DLIB_PERTHREAD };
+}
+
+define block DATA with fixed order, maximum size = BL2_DATA_SIZE {
+ block TFM_SHARED_DATA,
+ block ER_DATA,
+ block ARM_LIB_STACK,
+ overlay HEAP_OVL
+};
+place at address BOOT_TFM_SHARED_DATA_BASE {block DATA};
diff --git a/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_ns.icf b/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_ns.icf
new file mode 100644
index 0000000000..1eb6137e39
--- /dev/null
+++ b/platform/ext/target/mps2/fvp_sse300/device/source/iar/fvp_sse300_mps2_ns.icf
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2020 Arm Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ *
+ * This file is derivative of ../armclang/mps2_an521_ns.sct
+ */
+
+/* Linker script to configure memory regions. */
+/* This file will be run trough the pre-processor. */
+
+#include "region_defs.h"
+
+define block ER_CODE with fixed order, alignment = 8 {
+ section .intvec,
+ readonly};
+define block LR_CODE with fixed order, maximum size = NS_CODE_SIZE {block ER_CODE};
+place at address NS_CODE_START {block LR_CODE};
+
+define block ER_DATA with alignment = 8 {readwrite};
+define block ARM_LIB_STACK_MSP with alignment = 8, size = NS_MSP_STACK_SIZE { };
+define block ARM_LIB_STACK with alignment = 8, size = NS_PSP_STACK_SIZE { };
+define block HEAP with alignment = 8, size = NS_HEAP_SIZE { };
+define block ARM_LIB_HEAP with alignment = 8, size = NS_HEAP_SIZE { };
+define overlay HEAP_OVL {block HEAP};
+define overlay HEAP_OVL {block ARM_LIB_HEAP};
+keep {block ARM_LIB_STACK_MSP, block ARM_LIB_STACK,
+ block HEAP, block ARM_LIB_HEAP};
+
+do not initialize { section .noinit };
+initialize by copy { readwrite };
+if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
+{
+ // Required in a multi-threaded application
+ initialize by copy with packing = none { section __DLIB_PERTHREAD };
+}
+
+define block DATA with fixed order, maximum size = NS_DATA_SIZE {
+ block ER_DATA,
+ block ARM_LIB_STACK_MSP,
+ block ARM_LIB_STACK,
+ overlay HEAP_OVL
+};
+place at address NS_DATA_START {block DATA};
diff --git a/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_ns.c b/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_ns.c
index 22c05f16c5..90230777e9 100644
--- a/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_ns.c
+++ b/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_ns.c
@@ -22,6 +22,7 @@
*/
#include "cmsis.h"
+#include "region.h"
/*----------------------------------------------------------------------------
Exception / Interrupt Handler Function Prototype
@@ -32,8 +33,8 @@ typedef void( *pFunc )( void );
External References
*----------------------------------------------------------------------------*/
-#define __MSP_INITIAL_SP Image$$ARM_LIB_STACK_MSP$$ZI$$Limit
-#define __MSP_STACK_LIMIT Image$$ARM_LIB_STACK_MSP$$ZI$$Base
+#define __MSP_INITIAL_SP REGION_NAME(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Limit)
+#define __MSP_STACK_LIMIT REGION_NAME(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Base)
extern uint32_t __MSP_INITIAL_SP;
extern uint32_t __MSP_STACK_LIMIT;
diff --git a/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_s.c b/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_s.c
index 8f3a1addcb..8c6046fb2b 100644
--- a/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_s.c
+++ b/platform/ext/target/mps2/fvp_sse300/device/source/startup_fvp_sse300_mps2_s.c
@@ -22,6 +22,7 @@
*/
#include "cmsis.h"
+#include "region.h"
/*----------------------------------------------------------------------------
Exception / Interrupt Handler Function Prototype
@@ -32,8 +33,8 @@ typedef void( *pFunc )( void );
External References
*----------------------------------------------------------------------------*/
-#define __MSP_INITIAL_SP Image$$ARM_LIB_STACK_MSP$$ZI$$Limit
-#define __MSP_STACK_LIMIT Image$$ARM_LIB_STACK_MSP$$ZI$$Base
+#define __MSP_INITIAL_SP REGION_NAME(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Limit)
+#define __MSP_STACK_LIMIT REGION_NAME(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Base)
extern uint32_t __MSP_INITIAL_SP;
extern uint32_t __MSP_STACK_LIMIT;
diff --git a/platform/ext/target/mps2/fvp_sse300/target_cfg.h b/platform/ext/target/mps2/fvp_sse300/target_cfg.h
index fef71d3ee7..af6a907611 100644
--- a/platform/ext/target/mps2/fvp_sse300/target_cfg.h
+++ b/platform/ext/target/mps2/fvp_sse300/target_cfg.h
@@ -65,7 +65,7 @@ struct memory_region_limits {
struct tfm_spm_partition_platform_data_t {
uint32_t periph_start;
uint32_t periph_limit;
- int16_t periph_ppc_bank;
+ enum ppc_bank_e periph_ppc_bank;
int16_t periph_ppc_mask;
};