aboutsummaryrefslogtreecommitdiff
path: root/secure_fw
diff options
context:
space:
mode:
authorKevin Peng <kevin.peng@arm.com>2021-03-22 18:07:43 +0800
committerKen Liu <ken.liu@arm.com>2021-05-08 09:40:26 +0200
commit77ad9f8777328faac28a1572b255af5b49b21f5b (patch)
treec01099f16a02ec5ab12ceb94f6d75d95cc415b26 /secure_fw
parenta5448d601df8de06837ecfe8010c22253e3fb4be (diff)
downloadtrusted-firmware-m-77ad9f8777328faac28a1572b255af5b49b21f5b.tar.gz
SPM: Do not schedule if NSPE was interrupted by SPE
Scheduling should not happen if NSPE was interrupted by SPE, otherwise the NSPE and SPE would be out of sync on thread context. Note: Multi-core case does not have this issue. Change-Id: I58e376e175604c57cfd7d240de8030664ce6b4a7 Signed-off-by: Kevin Peng <kevin.peng@arm.com>
Diffstat (limited to 'secure_fw')
-rw-r--r--secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c8
-rw-r--r--secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c3
2 files changed, 11 insertions, 0 deletions
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
index 61a8cd7da..72d168536 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
@@ -53,6 +53,13 @@
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM volatile(
+#ifndef __ICCARM__
+ ".syntax unified \n"
+#endif
+ "movs r0, #0x40 \n"
+ "mov r1, lr \n"
+ "tst r0, r1 \n" /* Was NS interrupted by S? */
+ "beq exc_return \n" /* Yes, do not schedule */
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@@ -74,6 +81,7 @@ __attribute__((naked)) void PendSV_Handler(void)
"mov lr, r3 \n"
"msr psp, r0 \n"
"msr psplim, r1 \n"
+ "exc_return: \n"
"bx lr \n"
);
}
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
index 57fd9a2f5..7ee168b14 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
@@ -56,6 +56,9 @@
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM volatile(
+ "tst lr, #0x40 \n" /* Was NS interrupted by S? */
+ "it eq \n"
+ "bxeq lr \n" /* Yes, do not schedule */
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"