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authorXinyu Zhang <xinyu.zhang@arm.com>2021-04-16 17:57:09 +0800
committerKen Liu <ken.liu@arm.com>2021-06-02 07:56:28 +0200
commit3a4532431b460ef9feddd857d7eccf6daf11c38e (patch)
treeb043a247ea3780754fbc62a9fc6fec1a7633127c /secure_fw
parent16ad2afb0f8df65e2690bb38ba8d60030869cf35 (diff)
downloadtrusted-firmware-m-3a4532431b460ef9feddd857d7eccf6daf11c38e.tar.gz
SPM: Modify codes to pass CI CheckPatch
Following errors/warnings are resolved: C99_COMMENTS: do not use C99 // comments CONSTANT_COMPARISON: Comparisons should place the constant on the right side FUNCTION_WITHOUT_ARGS: Bad function definition LINE_CONTINUATIONS: Avoid unnecessary line continuations LINE_SPACING: Missing a blank line after declarations LONG_LINE: line length exceeds 100 columns PREFER_ALIGNED: __aligned(x) is preferred over __attribute__((aligned(x))) PREFER_SECTION: __section(x) is preferred over __attribute__((section(x))) SPACING: space prohibited between function name and open parenthesis '(' SPACING: spaces required around that '=' TYPO_SPELLING: words misspelled Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com> Change-Id: I0ceefff582c7b70ea86b7080f763c931b758849e
Diffstat (limited to 'secure_fw')
-rw-r--r--secure_fw/spm/cmsis_func/arch.c19
-rw-r--r--secure_fw/spm/cmsis_func/spm_func.c2
-rw-r--r--secure_fw/spm/cmsis_func/tfm_nspm_func.c62
-rw-r--r--secure_fw/spm/cmsis_psa/arch/tfm_arch.c2
-rw-r--r--secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c2
-rw-r--r--secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c4
-rw-r--r--secure_fw/spm/cmsis_psa/spm_ipc.c6
-rw-r--r--secure_fw/spm/cmsis_psa/spm_ipc.h2
-rw-r--r--secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c51
-rw-r--r--secure_fw/spm/cmsis_psa/tfm_pools.h3
-rw-r--r--secure_fw/spm/cmsis_psa/tfm_rpc.c2
-rw-r--r--secure_fw/spm/cmsis_psa/tfm_thread.c2
-rw-r--r--secure_fw/spm/cmsis_psa/tfm_thread.h2
-rw-r--r--secure_fw/spm/include/compiler_ext_defs.h27
14 files changed, 119 insertions, 67 deletions
diff --git a/secure_fw/spm/cmsis_func/arch.c b/secure_fw/spm/cmsis_func/arch.c
index 0ec79d87c..6fe40dbd9 100644
--- a/secure_fw/spm/cmsis_func/arch.c
+++ b/secure_fw/spm/cmsis_func/arch.c
@@ -6,13 +6,14 @@
*/
#include "arch.h"
+#include "compiler_ext_defs.h"
#include "exception_info.h"
#include "tfm_secure_api.h"
#include "tfm/tfm_spm_services.h"
#if defined(__ICCARM__)
uint32_t tfm_core_svc_handler(uint32_t *msp, uint32_t *psp, uint32_t exc_return);
-#pragma required=tfm_core_svc_handler
+#pragma required = tfm_core_svc_handler
#endif
nsfptr_t ns_entry;
@@ -100,7 +101,7 @@ void psa_eoi(psa_signal_t irq_signal)
}
#if defined(__ARM_ARCH_8_1M_MAIN__) || defined(__ARM_ARCH_8M_MAIN__)
-__attribute__((section("SFN"), naked))
+__section("SFN") __naked
int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr)
{
__ASM volatile(
@@ -122,7 +123,7 @@ int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr)
);
}
-__attribute__((section("SFN"), naked))
+__section("SFN") __naked
void priv_irq_handler_main(uint32_t partition_id, uint32_t unpriv_handler,
uint32_t irq_signal, uint32_t irq_line)
{
@@ -153,7 +154,7 @@ void priv_irq_handler_main(uint32_t partition_id, uint32_t unpriv_handler,
);
}
#elif defined(__ARM_ARCH_8M_BASE__)
-__attribute__((section("SFN"), naked))
+__section("SFN") __naked
int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr)
{
__ASM volatile(
@@ -191,7 +192,7 @@ int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr)
);
}
-__attribute__((section("SFN"), naked))
+__section("SFN") __naked
void priv_irq_handler_main(uint32_t partition_id, uint32_t unpriv_handler,
uint32_t irq_signal, uint32_t irq_line)
{
@@ -271,12 +272,12 @@ void tfm_arch_set_secure_exception_priorities(void)
void tfm_arch_config_extensions(void)
{
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
/* Configure Secure access to the FPU only if the secure image is being
* built with the FPU in use. This avoids introducing extra interrupt
* latency when the FPU is not used by the SPE.
*/
-#if defined (__FPU_USED) && (__FPU_USED == 1U)
+#if defined(__FPU_USED) && (__FPU_USED == 1U)
/* Enable Secure privileged and unprivilged access to the FP Extension */
SCB->CPACR |= (3U << 10U*2U) /* enable CP10 full access */
| (3U << 11U*2U); /* enable CP11 full access */
@@ -306,7 +307,9 @@ void tfm_arch_config_extensions(void)
#endif
}
-#if defined(__ARM_ARCH_8M_BASE__) || defined(__ARM_ARCH_8_1M_MAIN__) || defined(__ARM_ARCH_8M_MAIN__)
+#if defined(__ARM_ARCH_8M_BASE__) || \
+ defined(__ARM_ARCH_8_1M_MAIN__) || \
+ defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) void SVC_Handler(void)
{
__ASM volatile(
diff --git a/secure_fw/spm/cmsis_func/spm_func.c b/secure_fw/spm/cmsis_func/spm_func.c
index 8f77cdb01..1144b441c 100644
--- a/secure_fw/spm/cmsis_func/spm_func.c
+++ b/secure_fw/spm/cmsis_func/spm_func.c
@@ -474,12 +474,12 @@ static enum tfm_status_e tfm_start_partition(
const struct iovec_params_t *iovec_ptr,
uint32_t excReturn)
{
+ register uint32_t partition_idx;
enum tfm_status_e res;
uint32_t caller_partition_idx = desc_ptr->caller_part_idx;
const struct spm_partition_runtime_data_t *curr_part_data;
const struct spm_partition_runtime_data_t *caller_part_data;
uint32_t caller_flags;
- register uint32_t partition_idx;
uint32_t psp;
uint32_t partition_psp, partition_psplim;
uint32_t partition_state;
diff --git a/secure_fw/spm/cmsis_func/tfm_nspm_func.c b/secure_fw/spm/cmsis_func/tfm_nspm_func.c
index ad4a17eb5..b27bb443c 100644
--- a/secure_fw/spm/cmsis_func/tfm_nspm_func.c
+++ b/secure_fw/spm/cmsis_func/tfm_nspm_func.c
@@ -34,7 +34,7 @@ static struct ns_client_list_t {
static int32_t free_index = 0U;
static int32_t active_ns_client_idx = INVALID_NS_CLIENT_IDX;
-static int get_next_ns_client_id()
+static int get_next_ns_client_id(void)
{
static int32_t next_ns_client_id = DEFAULT_NS_CLIENT_ID;
@@ -78,8 +78,10 @@ int32_t tfm_nspm_get_current_client_id(void)
* Currently the context management only contains the NS ID identification
*/
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
+/**
+ * Initialize secure context memory system
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
uint32_t TZ_InitContextSystem_S(void)
@@ -108,13 +110,15 @@ uint32_t TZ_InitContextSystem_S(void)
return 1U;
}
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in] module identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0 no memory available or internal error
+/**
+ * Allocate context memory for calling secure software modules in TrustZone
+ * \param[in] module identifies software modules called from non-secure mode
+ * \return value != 0 id TrustZone memory slot identifier
+ * \return value 0 no memory available or internal error
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module)
+TZ_MemoryId_t TZ_AllocModuleContext_S(TZ_ModuleId_t module)
{
TZ_MemoryId_t tz_id = 1;
(void) module; /* Currently unused */
@@ -141,12 +145,14 @@ TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module)
return tz_id;
}
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id)
+uint32_t TZ_FreeModuleContext_S(TZ_MemoryId_t id)
{
#ifdef CONFIG_TFM_ENABLE_CTX_MGMT
#ifdef TFM_NS_CLIENT_IDENTIFICATION
@@ -183,15 +189,17 @@ uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id)
(void)id;
#endif /* CONFIG_TFM_ENABLE_CTX_MGMT */
- return 1U; // Success
+ return 1U; /* Success */
}
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Load secure context (called on RTOS thread context switch)
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id)
+uint32_t TZ_LoadContext_S(TZ_MemoryId_t id)
{
#ifdef CONFIG_TFM_ENABLE_CTX_MGMT
#ifdef TFM_NS_CLIENT_IDENTIFICATION
@@ -222,15 +230,17 @@ uint32_t TZ_LoadContext_S (TZ_MemoryId_t id)
(void)id;
#endif /* CONFIG_TFM_ENABLE_CTX_MGMT */
- return 1U; // Success
+ return 1U; /* Success */
}
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Store secure context (called on RTOS thread context switch)
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id)
+uint32_t TZ_StoreContext_S(TZ_MemoryId_t id)
{
#ifdef CONFIG_TFM_ENABLE_CTX_MGMT
#ifdef TFM_NS_CLIENT_IDENTIFICATION
@@ -266,12 +276,12 @@ uint32_t TZ_StoreContext_S (TZ_MemoryId_t id)
(void)id;
#endif /* CONFIG_TFM_ENABLE_CTX_MGMT */
- return 1U; // Success
+ return 1U; /* Success */
}
#ifdef TFM_NS_CLIENT_IDENTIFICATION
__tfm_nspm_secure_gateway_attributes__
-enum tfm_status_e tfm_register_client_id (int32_t ns_client_id)
+enum tfm_status_e tfm_register_client_id(int32_t ns_client_id)
{
int current_client_id;
@@ -291,7 +301,7 @@ enum tfm_status_e tfm_register_client_id (int32_t ns_client_id)
}
current_client_id = NsClientIdList[active_ns_client_idx].ns_client_id;
- if (current_client_id >= 0 ) {
+ if (current_client_id >= 0) {
/* The client ID is invalid */
return TFM_ERROR_INVALID_PARAMETER;
}
@@ -318,5 +328,5 @@ void configure_ns_code(void)
/* Clears LSB of the function address to indicate the function-call
* will perform the switch from secure to non-secure
*/
- ns_entry = (nsfptr_t) cmse_nsfptr_create(entry_ptr);
+ ns_entry = (nsfptr_t)cmse_nsfptr_create(entry_ptr);
}
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
index 412e8c226..34b347de2 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
@@ -42,7 +42,7 @@ void tfm_arch_init_context(struct tfm_arch_ctx_t *p_actx,
void *param, uintptr_t pfn,
uintptr_t stk_btm, uintptr_t stk_top)
{
- struct tfm_state_context_t *p_stat_ctx=
+ struct tfm_state_context_t *p_stat_ctx =
(struct tfm_state_context_t *)tfm_arch_seal_thread_stack(stk_top);
/*
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
index 090e401c8..fc41394c5 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
@@ -158,7 +158,7 @@ void tfm_arch_config_extensions(void)
{
/* There are no coprocessors in Armv6-M implementations */
#ifndef __ARM_ARCH_6M__
-#if defined (__FPU_USED) && (__FPU_USED == 1U)
+#if defined(__FPU_USED) && (__FPU_USED == 1U)
/* Enable privileged and unprivilged access to the floating-point
* coprocessor.
*/
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
index 6fbebff93..6a269be99 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
@@ -200,12 +200,12 @@ void tfm_arch_set_secure_exception_priorities(void)
void tfm_arch_config_extensions(void)
{
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
/* Configure Secure access to the FPU only if the secure image is being
* built with the FPU in use. This avoids introducing extra interrupt
* latency when the FPU is not used by the SPE.
*/
-#if defined (__FPU_USED) && (__FPU_USED == 1U)
+#if defined(__FPU_USED) && (__FPU_USED == 1U)
/* Enable Secure privileged and unprivilged access to the FP Extension */
SCB->CPACR |= (3U << 10U*2U) /* enable CP10 full access */
| (3U << 11U*2U); /* enable CP11 full access */
diff --git a/secure_fw/spm/cmsis_psa/spm_ipc.c b/secure_fw/spm/cmsis_psa/spm_ipc.c
index ed3fe0d47..d8d90607d 100644
--- a/secure_fw/spm/cmsis_psa/spm_ipc.c
+++ b/secure_fw/spm/cmsis_psa/spm_ipc.c
@@ -202,7 +202,7 @@ int32_t tfm_spm_set_rhandle(struct service_t *service,
}
/**
- * \brief Get reverse handle value from connection hanlde.
+ * \brief Get reverse handle value from connection handle.
*
* \param[in] service Target service context pointer
* \param[in] conn_handle Connection handle created by
@@ -211,7 +211,7 @@ int32_t tfm_spm_set_rhandle(struct service_t *service,
* \retval void * Success
* \retval "Does not return" Panic for those:
* service pointer are NULL
- * hanlde is \ref PSA_NULL_HANDLE
+ * handle is \ref PSA_NULL_HANDLE
* handle node does not be found
*/
static void *tfm_spm_get_rhandle(struct service_t *service,
@@ -965,7 +965,7 @@ void tfm_spm_validate_caller(struct partition_t *p_cur_sp, uint32_t *p_ctx,
TFM_STACK_SEALED_SIZE;
if (is_stack_alloc_fp_space(exc_return)) {
-#if defined (__FPU_USED) && (__FPU_USED == 1U)
+#if defined(__FPU_USED) && (__FPU_USED == 1U)
if (FPU->FPCCR & FPU_FPCCR_TS_Msk) {
stacked_ctx_pos += TFM_ADDTIONAL_FP_CONTEXT_WORDS *
sizeof(uint32_t);
diff --git a/secure_fw/spm/cmsis_psa/spm_ipc.h b/secure_fw/spm/cmsis_psa/spm_ipc.h
index 37e6f2d08..aee6f2c6c 100644
--- a/secure_fw/spm/cmsis_psa/spm_ipc.h
+++ b/secure_fw/spm/cmsis_psa/spm_ipc.h
@@ -60,7 +60,7 @@
struct tfm_msg_body_t {
int32_t magic;
struct service_t *service; /* RoT service pointer */
- struct tfm_event_t ack_evnt; /* Event for ack reponse */
+ struct tfm_event_t ack_evnt; /* Event for ack response */
psa_msg_t msg; /* PSA message body */
psa_invec invec[PSA_MAX_IOVEC]; /* Put in/out vectors in msg body */
psa_outvec outvec[PSA_MAX_IOVEC];
diff --git a/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c b/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
index 00e2d9243..6cb3a0c19 100644
--- a/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
+++ b/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
@@ -6,6 +6,7 @@
*/
#include <stdbool.h>
+#include "compiler_ext_defs.h"
#include "tfm_spm_hal.h"
#include "psa/error.h"
#include "tfm_nspm.h"
@@ -21,8 +22,10 @@ int32_t tfm_nspm_get_current_client_id(void)
/* TF-M implementation of the CMSIS TZ RTOS thread context management API */
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
+/**
+ * Initialize secure context memory system
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
uint32_t TZ_InitContextSystem_S(void)
@@ -30,47 +33,55 @@ uint32_t TZ_InitContextSystem_S(void)
return 1U;
}
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in] module identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0 no memory available or internal error
+/**
+ * Allocate context memory for calling secure software modules in TrustZone
+ * \param[in] module identifies software modules called from non-secure mode
+ * \return value != 0 id TrustZone memory slot identifier
+ * \return value 0 no memory available or internal error
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module)
+TZ_MemoryId_t TZ_AllocModuleContext_S(TZ_ModuleId_t module)
{
/* add attribute 'noinline' to avoid a build error. */
(void)module;
return 1U;
}
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id)
+uint32_t TZ_FreeModuleContext_S(TZ_MemoryId_t id)
{
(void)id;
return 1U;
}
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Load secure context (called on RTOS thread context switch)
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id)
+uint32_t TZ_LoadContext_S(TZ_MemoryId_t id)
{
(void)id;
return 1U;
}
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
+/**
+ * Store secure context (called on RTOS thread context switch)
+ * \param[in] id TrustZone memory slot identifier
+ * \return execution status (1: success, 0: error)
+ */
/* This veneer is TF-M internal, not a secure service */
__tfm_nspm_secure_gateway_attributes__
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id)
+uint32_t TZ_StoreContext_S(TZ_MemoryId_t id)
{
(void)id;
return 1U;
@@ -80,7 +91,7 @@ uint32_t TZ_StoreContext_S (TZ_MemoryId_t id)
* 'r0' impliedly holds the address of non-secure entry,
* given during non-secure partition initialization.
*/
-__attribute__((naked, section("SFN")))
+__section("SFN") __naked
void tfm_nspm_thread_entry(void)
{
__ASM volatile(
diff --git a/secure_fw/spm/cmsis_psa/tfm_pools.h b/secure_fw/spm/cmsis_psa/tfm_pools.h
index 6f2f30da8..fe70ca3b5 100644
--- a/secure_fw/spm/cmsis_psa/tfm_pools.h
+++ b/secure_fw/spm/cmsis_psa/tfm_pools.h
@@ -8,6 +8,7 @@
#define __TFM_POOLS_H__
#include <stdbool.h>
+#include "compiler_ext_defs.h"
#include "lists.h"
/*
@@ -37,7 +38,7 @@ struct tfm_pool_instance_t {
static uint8_t name##_pool_buf[((chunksz) + \
sizeof(struct tfm_pool_chunk_t)) * (num) \
+ sizeof(struct tfm_pool_instance_t)] \
- __attribute__((aligned(4))); \
+ __aligned(4); \
static struct tfm_pool_instance_t *name = \
(struct tfm_pool_instance_t *)name##_pool_buf
diff --git a/secure_fw/spm/cmsis_psa/tfm_rpc.c b/secure_fw/spm/cmsis_psa/tfm_rpc.c
index 5872649ed..a4fbc0c36 100644
--- a/secure_fw/spm/cmsis_psa/tfm_rpc.c
+++ b/secure_fw/spm/cmsis_psa/tfm_rpc.c
@@ -86,7 +86,7 @@ int32_t tfm_rpc_register_ops(const struct tfm_rpc_ops_t *ops_ptr)
/* Currently, one and only one mailbox implementation is supported. */
if ((rpc_ops.handle_req != default_handle_req) ||
- (rpc_ops.reply != default_mailbox_reply) || \
+ (rpc_ops.reply != default_mailbox_reply) ||
(rpc_ops.get_caller_data != default_get_caller_data)) {
return TFM_RPC_CONFLICT_CALLBACK;
}
diff --git a/secure_fw/spm/cmsis_psa/tfm_thread.c b/secure_fw/spm/cmsis_psa/tfm_thread.c
index 91d272de4..ca18e752e 100644
--- a/secure_fw/spm/cmsis_psa/tfm_thread.c
+++ b/secure_fw/spm/cmsis_psa/tfm_thread.c
@@ -109,7 +109,7 @@ void tfm_core_thrd_set_state(struct tfm_core_thread_t *pth, uint32_t new_state)
* depth while searching for a first runnable thread.
*/
if ((pth->state == THRD_STATE_RUNNABLE) &&
- (RNBL_HEAD == NULL || (pth->prior < RNBL_HEAD->prior))) {
+ ((RNBL_HEAD == NULL) || (pth->prior < RNBL_HEAD->prior))) {
RNBL_HEAD = pth;
} else {
RNBL_HEAD = LIST_HEAD;
diff --git a/secure_fw/spm/cmsis_psa/tfm_thread.h b/secure_fw/spm/cmsis_psa/tfm_thread.h
index 159344b53..3841f942a 100644
--- a/secure_fw/spm/cmsis_psa/tfm_thread.h
+++ b/secure_fw/spm/cmsis_psa/tfm_thread.h
@@ -162,7 +162,7 @@ void __STATIC_INLINE tfm_core_thrd_set_retval(struct tfm_core_thread_t *pth,
*
* Notes :
* This function validates thread info. It returns error if thread info
- * is not correct. Thread is avaliable after successful tfm_core_thrd_start().
+ * is not correct. Thread is available after successful tfm_core_thrd_start().
*/
uint32_t tfm_core_thrd_start(struct tfm_core_thread_t *pth);
diff --git a/secure_fw/spm/include/compiler_ext_defs.h b/secure_fw/spm/include/compiler_ext_defs.h
new file mode 100644
index 000000000..fd84de701
--- /dev/null
+++ b/secure_fw/spm/include/compiler_ext_defs.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef __COMPILER_EXT_DEFS_H__
+#define __COMPILER_EXT_DEFS_H__
+
+#if defined(__ARMCC_VERSION) || defined(__GNUC__) || defined(__ICCARM__)
+
+#ifndef __naked
+#define __naked __attribute__((naked))
+#endif
+
+#ifndef __section
+#define __section(x) __attribute__((section(x)))
+#endif
+
+#ifndef __aligned
+#define __aligned(x) __attribute__((aligned(x)))
+#endif
+
+#endif /* __ARMCC_VERSION __GNUC__ __ICCARM__*/
+
+#endif /* __COMPILER_EXT_DEFS_H__ */