aboutsummaryrefslogtreecommitdiff
path: root/platform
diff options
context:
space:
mode:
authorAndreas Vibeto <andreas.vibeto@nordicsemi.no>2021-06-03 14:01:41 +0200
committerDavid Hu <david.hu@arm.com>2021-06-07 11:46:09 +0200
commit4d1b7b38e75707c04efba4dc3b73ca8f36cacae2 (patch)
treedc2d36ee2b217a96458bd44673a7357588d78c0e /platform
parentde3cc52ea8910d7532fb75b67041d08ed02daec0 (diff)
downloadtrusted-firmware-m-4d1b7b38e75707c04efba4dc3b73ca8f36cacae2.tar.gz
Platform: Initialize PSA test memory on power-on and pin reset
Initialize the memory area on both power-on and pin reset Only initialize memory from the non-secure application to prevent initializing twice Clear reset register after reading Signed-off-by: Andreas Vibeto <andreas.vibeto@nordicsemi.no> Change-Id: If3aee8d5b31f0a48ec432e3d3f39c029cda3fd7a
Diffstat (limited to 'platform')
-rw-r--r--platform/ext/target/lairdconnectivity/common/core/plat_test.c22
-rw-r--r--platform/ext/target/nordic_nrf/common/core/plat_test.c32
2 files changed, 30 insertions, 24 deletions
diff --git a/platform/ext/target/lairdconnectivity/common/core/plat_test.c b/platform/ext/target/lairdconnectivity/common/core/plat_test.c
index 6f5f9a010..cac467cc9 100644
--- a/platform/ext/target/lairdconnectivity/common/core/plat_test.c
+++ b/platform/ext/target/lairdconnectivity/common/core/plat_test.c
@@ -354,15 +354,23 @@ void TIMER1_Handler(void)
uint32_t pal_nvmem_get_addr(void)
{
- static bool psa_scratch_initialized = false;
static __ALIGN(4) uint8_t __psa_scratch[PSA_TEST_SCRATCH_AREA_SIZE];
+#ifdef NRF_TRUSTZONE_NONSECURE
+ static bool psa_scratch_initialized = false;
+
+ if (!psa_scratch_initialized) {
+ uint32_t reset_reason = nrfx_reset_reason_get();
+ nrfx_reset_reason_clear(reset_reason);
- if (!psa_scratch_initialized && (nrfx_reset_reason_get() == 0)) {
- /* PSA API tests expect this area to be initialized to all 0xFFs after a
- * power-on reset.
- */
- memset(__psa_scratch, 0xFF, PSA_TEST_SCRATCH_AREA_SIZE);
+ int is_pinreset = reset_reason & NRFX_RESET_REASON_RESETPIN_MASK;
+ if ((reset_reason == 0) || is_pinreset){
+ /* PSA API tests expect this area to be initialized to all 0xFFs
+ * after a power-on or pin reset.
+ */
+ memset(__psa_scratch, 0xFF, PSA_TEST_SCRATCH_AREA_SIZE);
+ }
+ psa_scratch_initialized = true;
}
- psa_scratch_initialized = true;
+#endif
return (uint32_t)__psa_scratch;
}
diff --git a/platform/ext/target/nordic_nrf/common/core/plat_test.c b/platform/ext/target/nordic_nrf/common/core/plat_test.c
index 4e014227f..02996acf6 100644
--- a/platform/ext/target/nordic_nrf/common/core/plat_test.c
+++ b/platform/ext/target/nordic_nrf/common/core/plat_test.c
@@ -155,25 +155,23 @@ void TIMER1_Handler(void)
uint32_t pal_nvmem_get_addr(void)
{
- static bool psa_scratch_initialized = false;
static __ALIGN(4) uint8_t __psa_scratch[PSA_TEST_SCRATCH_AREA_SIZE];
+#ifdef NRF_TRUSTZONE_NONSECURE
+ static bool psa_scratch_initialized = false;
- /* The POWER/RESET peripherals are defined as non-secure, so
- * the secure domain must access the non-secure address
- */
- uint32_t reset_reason;
- #if NRF_POWER_HAS_RESETREAS
- reset_reason = nrf_power_resetreas_get(NRF_POWER_NS);
- #else
- reset_reason = nrf_reset_resetreas_get(NRF_RESET_NS);
- #endif
-
- if (!psa_scratch_initialized && (reset_reason == 0)){
- /* PSA API tests expect this area to be initialized to all 0xFFs after a
- * power-on reset.
- */
- memset(__psa_scratch, 0xFF, PSA_TEST_SCRATCH_AREA_SIZE);
+ if (!psa_scratch_initialized) {
+ uint32_t reset_reason = nrfx_reset_reason_get();
+ nrfx_reset_reason_clear(reset_reason);
+
+ int is_pinreset = reset_reason & NRFX_RESET_REASON_RESETPIN_MASK;
+ if ((reset_reason == 0) || is_pinreset){
+ /* PSA API tests expect this area to be initialized to all 0xFFs
+ * after a power-on or pin reset.
+ */
+ memset(__psa_scratch, 0xFF, PSA_TEST_SCRATCH_AREA_SIZE);
+ }
+ psa_scratch_initialized = true;
}
- psa_scratch_initialized = true;
+#endif
return (uint32_t)__psa_scratch;
}