diff options
author | Jimmy Brisson <jimmy.brisson@linaro.org> | 2021-04-22 13:03:42 -0500 |
---|---|---|
committer | David Hu <david.hu@arm.com> | 2021-06-18 06:19:25 +0200 |
commit | 3dee3651186b540d3d49568a2b3cfea819858554 (patch) | |
tree | 65591d4fc73f514084ab49dcf0b0237ce8b4c4c6 /platform | |
parent | 195f3ca5be786d48f28ce41aca8c3ed11d1e0515 (diff) | |
download | trusted-firmware-m-3dee3651186b540d3d49568a2b3cfea819858554.tar.gz |
Build MPS3 AN547 with GCC
Since this code was written, GCC now compiles for the M55. From what I
can tell (by diffing scatter files), the an524 and the an547 have very
similar code layout. So the linker scripts used are from the an524.
This also includes a note in the documentation about the required gcc
version.
Change-Id: I365ad3f934956a46756293694a44cca08ea25898
Signed-off-by: Jimmy Brisson <jimmy.brisson@linaro.org>
Diffstat (limited to 'platform')
4 files changed, 399 insertions, 8 deletions
diff --git a/platform/ext/target/arm/mps3/an547/CMakeLists.txt b/platform/ext/target/arm/mps3/an547/CMakeLists.txt index 51e36bed21..52d859d49b 100644 --- a/platform/ext/target/arm/mps3/an547/CMakeLists.txt +++ b/platform/ext/target/arm/mps3/an547/CMakeLists.txt @@ -17,10 +17,6 @@ target_include_directories(platform_region_defs #========================= Platform common defs ===============================# -if (${CMAKE_C_COMPILER_ID} STREQUAL GNU) - message(FATAL_ERROR "GCC is currently not supported on the mps3/an547 because TFM build system does not support the Coretex-M55 with GNUARM") -endif() - if (${CMAKE_C_COMPILER_ID} STREQUAL IAR) message(FATAL_ERROR "IAR is currently not supported on the mps3/an547 due to a lack of scatter files") endif() @@ -34,19 +30,21 @@ endif() # Specify the location of platform specific build dependencies. target_sources(tfm_s PRIVATE - $<$<C_COMPILER_ID:ARMClang>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_s.c> + ${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_s.c ) target_add_scatter_file(tfm_s $<$<C_COMPILER_ID:ARMClang>:${CMAKE_SOURCE_DIR}/platform/ext/common/armclang/tfm_common_s.sct> + $<$<C_COMPILER_ID:GNU>:${CMAKE_SOURCE_DIR}/platform/ext/common/gcc/tfm_common_s.ld> ) if(NS) target_sources(tfm_ns PRIVATE - $<$<C_COMPILER_ID:ARMClang>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_ns.c> + ${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_ns.c ) target_add_scatter_file(tfm_ns $<$<C_COMPILER_ID:ARMClang>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/armclang/an547_ns.sct> + $<$<C_COMPILER_ID:GNU>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/gcc/an547_ns.ld> ) target_link_libraries(CMSIS_5_tfm_ns INTERFACE @@ -57,10 +55,11 @@ endif() if(BL2) target_sources(bl2 PRIVATE - $<$<C_COMPILER_ID:ARMClang>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_bl2.c> + ${CMAKE_CURRENT_SOURCE_DIR}/device/source/startup_an547_bl2.c ) target_add_scatter_file(bl2 $<$<C_COMPILER_ID:ARMClang>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/armclang/an547_bl2.sct> + $<$<C_COMPILER_ID:GNU>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/gcc/an547_bl2.ld> ) endif() @@ -144,6 +143,12 @@ target_include_directories(platform_ns services/src ) +# TODO: For some reason this is needed +target_link_libraries(platform_ns + PRIVATE + psa_interface +) + #========================= Platform BL2 =======================================# if(BL2) diff --git a/platform/ext/target/arm/mps3/an547/README.rst b/platform/ext/target/arm/mps3/an547/README.rst index e81694ca6e..02041c8e1c 100644 --- a/platform/ext/target/arm/mps3/an547/README.rst +++ b/platform/ext/target/arm/mps3/an547/README.rst @@ -5,7 +5,12 @@ Building TF-M ------------- Follow the instructions in :doc:`Building instructions </docs/technical_references/instructions/tfm_build_instruction>`. -Build instructions with platform name: mps3/an547 (-DTFM_PLATFORM=mps3/an547). +Build instructions with platform name: arm/mps3/an547 (-DTFM_PLATFORM=arm/mps3/an547). + +.. note:: + + When building with GNUARM, please use the version of gcc shipped with zephyr + SDK 0.13.0-alpha1, arm-zephyr-eabi-gcc version 10.3.0. .. note:: diff --git a/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_bl2.ld b/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_bl2.ld new file mode 100644 index 0000000000..fac16569a3 --- /dev/null +++ b/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_bl2.ld @@ -0,0 +1,191 @@ +;/* +; * Copyright (c) 2021 Arm Limited. All rights reserved. +; * +; * Licensed under the Apache License, Version 2.0 (the "License"); +; * you may not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * http://www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an "AS IS" BASIS, +; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; * +; * +; * This file is derivative of CMSIS V5.00 gcc_arm.ld +; */ + +/* Linker script to configure memory regions. */ +/* This file will be run trough the pre-processor. */ + +#include "region_defs.h" + +MEMORY +{ + FLASH (rx) : ORIGIN = BL2_CODE_START, LENGTH = BL2_CODE_SIZE + RAM (rwx) : ORIGIN = BL2_DATA_START, LENGTH = BL2_DATA_SIZE +} + +__heap_size__ = BL2_HEAP_SIZE; +__msp_stack_size__ = BL2_MSP_STACK_SIZE; + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * define etext2/data2_start/data2_end and + * define __STARTUP_COPY_MULTIPLE in startup_cmsdk_mps3_an524_bl2.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (DEFINED(__etext2) ? __etext2 : 0) + LONG (DEFINED(__data2_start__) ? __data2_start__ : 0) + LONG (DEFINED(__data2_start__) ? __data2_end__ - __data2_start__ : 0) + __copy_table_end__ = .; + } > FLASH + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_cmsdk_mps3_an524_bl2.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (DEFINED(__bss2_start__) ? __bss2_start__ : 0) + LONG (DEFINED(__bss2_start__) ? __bss2_end__ - __bss2_start__ : 0) + __zero_table_end__ = .; + } > FLASH + + __etext = .; + + .tfm_bl2_shared_data : ALIGN(32) + { + . += BOOT_TFM_SHARED_DATA_SIZE; + } > RAM + Image$$SHARED_DATA$$RW$$Base = ADDR(.tfm_bl2_shared_data); + Image$$SHARED_DATA$$RW$$Limit = ADDR(.tfm_bl2_shared_data) + SIZEOF(.tfm_bl2_shared_data); + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + Image$$ER_DATA$$Base = ADDR(.data); + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + bss_size = __bss_end__ - __bss_start__; + + .msp_stack : ALIGN(32) + { + . += __msp_stack_size__; + } > RAM + Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack); + Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); + + .heap : ALIGN(8) + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += __heap_size__; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > RAM + Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap); + + PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); +} diff --git a/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_ns.ld b/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_ns.ld new file mode 100644 index 0000000000..66887d5f76 --- /dev/null +++ b/platform/ext/target/arm/mps3/an547/device/source/gcc/an547_ns.ld @@ -0,0 +1,190 @@ +;/* +; * Copyright (c) 2021 Arm Limited. All rights reserved. +; * +; * Licensed under the Apache License, Version 2.0 (the "License"); +; * you may not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * http://www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an "AS IS" BASIS, +; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; * +; * +; * This file is derivative of CMSIS V5.00 gcc_arm.ld +; */ + +/* Linker script to configure memory regions. */ +/* This file will be run trough the pre-processor. */ + +#include "region_defs.h" + +MEMORY +{ + FLASH (rx) : ORIGIN = NS_CODE_START, LENGTH = NS_CODE_SIZE + RAM (rwx) : ORIGIN = NS_DATA_START, LENGTH = NS_DATA_SIZE +} + +__heap_size__ = NS_HEAP_SIZE; +__psp_stack_size__ = NS_PSP_STACK_SIZE; +__msp_stack_size__ = NS_MSP_STACK_SIZE; + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * define etext2/data2_start/data2_end and + * define __STARTUP_COPY_MULTIPLE in startup_cmsdk_mps3_an524_ns.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (DEFINED(__etext2) ? __etext2 : 0) + LONG (DEFINED(__data2_start__) ? __data2_start__ : 0) + LONG (DEFINED(__data2_start__) ? __data2_end__ - __data2_start__ : 0) + __copy_table_end__ = .; + } > FLASH + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_cmsdk_mps3_an524_ns.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (DEFINED(__bss2_start__) ? __bss2_start__ : 0) + LONG (DEFINED(__bss2_start__) ? __bss2_end__ - __bss2_start__ : 0) + __zero_table_end__ = .; + } > FLASH + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + bss_size = __bss_end__ - __bss_start__; + + .msp_stack : ALIGN(32) + { + . += __msp_stack_size__; + } > RAM + Image$$ARM_LIB_STACK_MSP$$ZI$$Base = ADDR(.msp_stack); + Image$$ARM_LIB_STACK_MSP$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); + + .psp_stack : ALIGN(32) + { + . += __psp_stack_size__; + } > RAM + Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.psp_stack); + Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.psp_stack) + SIZEOF(.psp_stack); + + .heap : ALIGN(8) + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += __heap_size__; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > RAM + + PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); +} |