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author | Ken Liu <ken.liu@arm.com> | 2021-10-09 10:26:10 +0800 |
---|---|---|
committer | Ken Liu <ken.liu@arm.com> | 2021-10-14 03:37:39 +0200 |
commit | 09cb46af38852e76354eb93a0bb841d86687a702 (patch) | |
tree | c607bf7f0875539c7661b573a5e51e75bb93d1ef /platform/ext | |
parent | 5846d2b08016e73a90cfe393d591760be6169de2 (diff) | |
download | trusted-firmware-m-09cb46af38852e76354eb93a0bb841d86687a702.tar.gz |
Platform: AN547: Fix build error
Skip referencing 'secondary_partition_base' in no BL2 case.
Signed-off-by: Ken Liu <ken.liu@arm.com>
Change-Id: I7871ca4846c067a3d732b8b0b84dc6af233fcc84
Diffstat (limited to 'platform/ext')
-rw-r--r-- | platform/ext/target/arm/mps3/an547/target_cfg.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/platform/ext/target/arm/mps3/an547/target_cfg.c b/platform/ext/target/arm/mps3/an547/target_cfg.c index 9d2f029802..8729eec5bd 100644 --- a/platform/ext/target/arm/mps3/an547/target_cfg.c +++ b/platform/ext/target/arm/mps3/an547/target_cfg.c @@ -310,12 +310,14 @@ void sau_and_idau_cfg(void) SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk; +#ifdef BL2 /* Secondary image partition */ SAU->RNR = 4; SAU->RBAR = (memory_regions.secondary_partition_base & SAU_RBAR_BADDR_Msk); SAU->RLAR = (memory_regions.secondary_partition_limit & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk; +#endif /* Allows SAU to define the CODE region as a NSC */ sacfg->nsccfg |= CODENSC; @@ -357,6 +359,8 @@ enum tfm_plat_err_t mpc_init_cfg(void) ERROR_MSG("Failed to Configure MPC for SRAM!"); return TFM_PLAT_ERR_SYSTEM_ERR; } + +#ifdef BL2 ret = Driver_SRAM_MPC.ConfigRegion( memory_regions.secondary_partition_base, memory_regions.secondary_partition_limit, @@ -365,6 +369,7 @@ enum tfm_plat_err_t mpc_init_cfg(void) ERROR_MSG("Failed to Configure MPC for SRAM!"); return TFM_PLAT_ERR_SYSTEM_ERR; } +#endif /* Lock down the MPC configuration */ ret = Driver_ISRAM0_MPC.LockDown(); |