diff options
author | Joel Goddard <Joel.Goddard@arm.com> | 2023-12-06 18:38:14 +0000 |
---|---|---|
committer | Anton Komlev <Anton.Komlev@arm.com> | 2024-03-28 09:15:38 +0100 |
commit | 5c29c5f2b880433a4c35c00c95cebd7289ac0704 (patch) | |
tree | c9ed951d42501c7773354b0a0bb20e2e9b2cef1b /platform/ext/target | |
parent | e8e7cfe727d0b0fb58e05a31759eae323619138a (diff) | |
download | trusted-firmware-m-main.tar.gz |
Fremont has more than one LCP in the system and all the LCPs need to be
loaded with the same image. Loading a single image to multiple
destination is currently not supported by MCUBoot.
In order to load the LCP image to N LCP designations, load copies of the
LCP ramfw to each LCP in the system by changing the ATU regions and
calling boot_go_for_image_id manually for each LCP after LCP 0.
Also, introduce build flag for LCP count as different Fremont variants
can have different LCP count.
Co-authored-by: Arnold Gabriel Benedict <arnoldgabriel.benedict@arm.com>
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Signed-off-by: Shriram K <shriram.k@arm.com>
Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: I2998d1b53f600f503a31ea2d100fef07acf7ea1d
Diffstat (limited to 'platform/ext/target')
4 files changed, 74 insertions, 0 deletions
diff --git a/platform/ext/target/arm/rse/rdfremont/CMakeLists.txt b/platform/ext/target/arm/rse/rdfremont/CMakeLists.txt index 9d94e24b20..87e6bece72 100644 --- a/platform/ext/target/arm/rse/rdfremont/CMakeLists.txt +++ b/platform/ext/target/arm/rse/rdfremont/CMakeLists.txt @@ -84,6 +84,7 @@ target_include_directories(platform_bl2 target_compile_definitions(platform_bl2 PRIVATE + PLAT_LCP_COUNT=${PLAT_LCP_COUNT} PLATFORM_HOST_HAS_SCP PLATFORM_HOST_HAS_MCP ) diff --git a/platform/ext/target/arm/rse/rdfremont/bl2/boot_hal_bl2.c b/platform/ext/target/arm/rse/rdfremont/bl2/boot_hal_bl2.c index 3a458c678b..7aeb6bc2f5 100644 --- a/platform/ext/target/arm/rse/rdfremont/bl2/boot_hal_bl2.c +++ b/platform/ext/target/arm/rse/rdfremont/bl2/boot_hal_bl2.c @@ -441,6 +441,10 @@ static int boot_platform_pre_load_lcp(void) static int boot_platform_post_load_lcp(void) { enum atu_error_t atu_err; + struct boot_rsp rsp; + int lcp_idx; + fih_ret fih_rc = FIH_FAILURE; + fih_ret recovery_succeeded = FIH_FAILURE; BOOT_LOG_INF("BL2: LCP post load start"); @@ -457,6 +461,63 @@ static int boot_platform_post_load_lcp(void) return 1; } + /* + * Load LCP firmware to remaining LCP devices 1 to N + * + * MCUBoot currently only supports loading each image to one location. + * There are multiple LCPs that require the same image so to load the + * firmware to the remaining LCP devices, call the MCUBoot load function + * for each device with the ATU destination modified for each LCP. + */ + for (lcp_idx = 1; lcp_idx < PLAT_LCP_COUNT; lcp_idx++) { + /* + * Configure RSE ATU region to access the Cluster utility space and map + * to the i-th LCP's ITCM + */ + atu_err = atu_initialize_region(&ATU_DEV_S, + RSE_ATU_IMG_CODE_LOAD_ID, + HOST_LCP_IMG_CODE_BASE_S, + HOST_LCP_N_PHYS_BASE(lcp_idx), + HOST_LCP_ATU_SIZE); + if (atu_err != ATU_ERR_NONE) { + BOOT_LOG_ERR("BL2: ATU could not init LCP code load region"); + return 1; + } + + do { + /* + * Cleaning 'rsp' to avoid accidentally loading + * the NS image in case of a fault injection attack. + */ + memset(&rsp, 0, sizeof(struct boot_rsp)); + + FIH_CALL(boot_go_for_image_id, fih_rc, &rsp, RSE_FIRMWARE_LCP_ID); + + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + BOOT_LOG_ERR("BL2: Unable to find bootable LCP image"); + + recovery_succeeded = fih_ret_encode_zero_equality( + boot_initiate_recovery_mode(RSE_FIRMWARE_LCP_ID)); + if (FIH_NOT_EQ(recovery_succeeded, FIH_SUCCESS)) { + FIH_PANIC; + } + } + } while FIH_NOT_EQ(fih_rc, FIH_SUCCESS); + + /* + * Since the measurement are taken at this point, clear the image + * header part in the ITCM before releasing LCP out of reset. + */ + memset(HOST_LCP_IMG_HDR_BASE_S, 0, BL2_HEADER_SIZE); + + /* Close RSE ATU region configured to access LCP ITCM region */ + atu_err = atu_uninitialize_region(&ATU_DEV_S, RSE_ATU_IMG_CODE_LOAD_ID); + if (atu_err != ATU_ERR_NONE) { + BOOT_LOG_ERR("BL2: ATU could not uninit LCP code load region"); + return 1; + } + } + /* Close RSE ATU region configured to access RSE header region for LCP */ atu_err = atu_uninitialize_region(&ATU_DEV_S, RSE_ATU_IMG_HDR_LOAD_ID); if (atu_err != ATU_ERR_NONE) { diff --git a/platform/ext/target/arm/rse/rdfremont/config.cmake b/platform/ext/target/arm/rse/rdfremont/config.cmake index 41e77448a5..df8a20e60f 100644 --- a/platform/ext/target/arm/rse/rdfremont/config.cmake +++ b/platform/ext/target/arm/rse/rdfremont/config.cmake @@ -18,6 +18,7 @@ set(MCUBOOT_IMAGE_NUMBER 5 CACHE STRING "Number of images set(RSE_USE_HOST_UART OFF CACHE BOOL "Whether RSE should use the UART from the host system (opposed to dedicated UART private to RSE)") set(RSE_USE_HOST_FLASH OFF CACHE BOOL "Enable RSE using the host flash.") set(RSE_HAS_EXPANSION_PERIPHERALS ON CACHE BOOL "Whether RSE has sub-platform specific peripherals in the expansion layer") +set(PLAT_LCP_COUNT 16 CACHE STRING "Number of LCPs to load") set(RSE_LOAD_NS_IMAGE OFF CACHE BOOL "Whether to load an NS image") set(CONFIG_TFM_SPM_BACKEND IPC CACHE STRING "The SPM backend") diff --git a/platform/ext/target/arm/rse/rdfremont/host_atu_base_address.h b/platform/ext/target/arm/rse/rdfremont/host_atu_base_address.h index 42fa90acaf..6f0632f5be 100644 --- a/platform/ext/target/arm/rse/rdfremont/host_atu_base_address.h +++ b/platform/ext/target/arm/rse/rdfremont/host_atu_base_address.h @@ -179,6 +179,12 @@ enum rse_atu_ids { /* LCP */ +/* + * All LCP use the same ATU region but map it to a different physical address + * The physical address is the cluster utility space in SCP which has an + * address translation window for each LCP. + */ + /* LCP ATU HEADER logical address start */ #define HOST_LCP_HDR_ATU_WINDOW_BASE_S (HOST_MCP_IMG_CODE_BASE_S + \ HOST_MCP_ATU_SIZE) @@ -191,6 +197,11 @@ enum rse_atu_ids { RSE_IMG_HDR_ATU_WINDOW_SIZE) /* LCP0 ITCM window in AP address start */ #define HOST_LCP_0_PHYS_BASE (HOST_CLUST_UTIL_PHYS_BASE + 0x50000ULL) +/* Offset between LCP ITCM windows */ +#define HOST_LCP_N_PHYS_OFFSET 0x200000U /* 2 MB */ +/* LCP ITCM window in AP address start for LCP N */ +#define HOST_LCP_N_PHYS_BASE(n) (HOST_LCP_0_PHYS_BASE + \ + HOST_LCP_N_PHYS_OFFSET * (n)) /* LCP ATU CODE size (aligned size of LCP image) */ #define HOST_LCP_ATU_SIZE ALIGN_UP(SIZE_DEF_LCP_IMAGE, \ RSE_ATU_PAGE_SIZE) |