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authorTamas Ban <tamas.ban@arm.com>2020-09-16 11:02:52 +0100
committerTamas Ban <tamas.ban@arm.com>2020-09-30 08:07:38 +0000
commitf4023f3085579bdaa442faf82f0c21628fb4b6df (patch)
tree9f63c30443c0f1dac559e66910ad2230e4728e20
parent7d591a684b4abb0f61fbba8668dd6ea7b4b68698 (diff)
downloadtrusted-firmware-m-f4023f3085579bdaa442faf82f0c21628fb4b6df.tar.gz
Boot: Rename RAM_LOADING to RAM_LOAD
To be aligned with the original MCUboot repo. Change-Id: Icbd3c80a016584741fca056305f5bf5b0436182c Signed-off-by: Tamas Ban <tamas.ban@arm.com>
-rw-r--r--bl2/ext/mcuboot/include/target.h8
-rw-r--r--config/config_default.cmake2
-rw-r--r--docs/getting_started/tfm_secure_boot.rst76
-rw-r--r--platform/ext/readme.rst6
-rw-r--r--platform/ext/target/mps3/an524/config.cmake2
-rw-r--r--platform/ext/target/musca_a/config.cmake4
6 files changed, 49 insertions, 49 deletions
diff --git a/bl2/ext/mcuboot/include/target.h b/bl2/ext/mcuboot/include/target.h
index a812df6476..3ac0429953 100644
--- a/bl2/ext/mcuboot/include/target.h
+++ b/bl2/ext/mcuboot/include/target.h
@@ -27,17 +27,17 @@
#error "FLASH_AREA_IMAGE_SECTOR_SIZE must be defined by the target"
#endif
-#ifdef MCUBOOT_RAM_LOADING
+#ifdef MCUBOOT_RAM_LOAD
#ifndef IMAGE_EXECUTABLE_RAM_START
-#error "If MCUBOOT_RAM_LOADING is set then IMAGE_EXECUTABLE_RAM_START must be \
+#error "If MCUBOOT_RAM_LOAD is set then IMAGE_EXECUTABLE_RAM_START must be \
defined by the target"
#endif
#ifndef IMAGE_EXECUTABLE_RAM_SIZE
-#error "If MCUBOOT_RAM_LOADING is set then IMAGE_EXECUTABLE_RAM_SIZE must be \
+#error "If MCUBOOT_RAM_LOAD is set then IMAGE_EXECUTABLE_RAM_SIZE must be \
defined by the target"
#endif
-#endif /* MCUBOOT_RAM_LOADING */
+#endif /* MCUBOOT_RAM_LOAD */
#ifndef FLASH_AREA_0_OFFSET
#error "FLASH_AREA_0_OFFSET must be defined by the target"
diff --git a/config/config_default.cmake b/config/config_default.cmake
index 72ac29c640..f522e25358 100644
--- a/config/config_default.cmake
+++ b/config/config_default.cmake
@@ -28,7 +28,7 @@ set(MCUBOOT_IMAGE_NUMBER 2 CACHE STRING "Whether to
set(MCUBOOT_EXECUTION_SLOT 1 CACHE STRING "Slot from which to execute the image, used for XIP mode")
set(MCUBOOT_LOG_LEVEL "INFO" CACHE STRING "Level of logging to use for MCUboot [OFF, ERROR, WARNING, INFO, DEBUG]")
set(MCUBOOT_HW_KEY ON CACHE BOOL "Whether to embed the entire public key in the image metadata instead of the hash only")
-set(MCUBOOT_UPGRADE_STRATEGY "OVERWRITE_ONLY" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]")
+set(MCUBOOT_UPGRADE_STRATEGY "OVERWRITE_ONLY" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOAD]")
set(MCUBOOT_MEASURED_BOOT ON CACHE BOOL "Add boot measurement values to boot status. Used for initial attestation token")
set(MCUBOOT_HW_ROLLBACK_PROT ON CACHE BOOL "Enable security counter validation against non-volatile HW counters")
set(MCUBOOT_ENC_IMAGES OFF CACHE BOOL "Enable encrypted image upgrade support")
diff --git a/docs/getting_started/tfm_secure_boot.rst b/docs/getting_started/tfm_secure_boot.rst
index 7e87fd8344..e29630e84f 100644
--- a/docs/getting_started/tfm_secure_boot.rst
+++ b/docs/getting_started/tfm_secure_boot.rst
@@ -203,7 +203,7 @@ dependencies cannot be reused due to changes in the flash layout.
RAM Loading firmware upgrade
============================
Musca-A supports an image upgrade mode that is separate to the other (overwrite,
-swapping and dirext-xip) modes. This is the ``RAM loading`` mode (please refer
+swapping and dirext-xip) modes. This is the ``RAM load`` mode (please refer
to the table below). Like the direct-xip mode, this selects the newest image
by reading the image version numbers in the image headers, but instead of
executing it in place, the newest image is copied to RAM for execution. The load
@@ -212,7 +212,7 @@ image header.
.. Note::
- Only single image boot is supported with RAM loading upgrade mode.
+ Only single image boot is supported with ``RAM load`` upgrade mode.
Summary of different modes for image upgrade
============================================
@@ -221,39 +221,39 @@ overwriting, swapping, direct-xip or loading into RAM and executing from
there) are supported by the platforms. The table below shows which of these
modes are supported by which platforms:
-+---------------------+-----------------+-------------------------------------------------------------+
-| | Without BL2 [1]_| With BL2 [2]_ |
-+=====================+=================+===============+==========+================+=================+
-| | XIP | XIP | XIP | XIP | Not XIP |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| | | Overwrite [3]_| Swap [4]_| direct-xip [5]_| RAM loading [6]_|
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| AN521 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| AN519 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| AN539 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| FVP_SSE300_MPS2 | NO | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| LPC55S69 | No | No | No | No | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| Musca-A | No | No | No | No | Yes |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| Musca-B1 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| Musca-S1 | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| AN524 | Yes | No | No | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| PSoC64 | Yes | No | No | No | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| SSE-200_AWS | Yes | Yes | Yes | Yes | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| STM_DISCO_L562QE | No | Yes | No | No | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
-| STM_NUCLEO_L552ZE_Q | No | Yes | No | No | No |
-+---------------------+-----------------+---------------+----------+----------------+-----------------+
++---------------------+-----------------+----------------------------------------------------------+
+| | Without BL2 [1]_| With BL2 [2]_ |
++=====================+=================+===============+==========+================+==============+
+| | XIP | XIP | XIP | XIP | Not XIP |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| | | Overwrite [3]_| Swap [4]_| direct-xip [5]_| RAM load [6]_|
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| AN521 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| AN519 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| AN539 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| FVP_SSE300_MPS2 | NO | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| LPC55S69 | No | No | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| Musca-A | No | No | No | No | Yes |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| Musca-B1 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| Musca-S1 | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| AN524 | Yes | No | No | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| PSoC64 | Yes | No | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| SSE-200_AWS | Yes | Yes | Yes | Yes | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| STM_DISCO_L562QE | No | Yes | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
+| STM_NUCLEO_L552ZE_Q | No | Yes | No | No | No |
++---------------------+-----------------+---------------+----------+----------------+--------------+
.. [1] To disable BL2, please set the ``BL2`` cmake option to ``OFF``
@@ -270,7 +270,7 @@ modes are supported by which platforms:
``MCUBOOT_UPGRADE_STRATEGY`` configuration variable in the build
configuration file, or include this macro definition in the command line
-.. [6] To enable RAM loading, assign the "RAM_LOADING" string to the
+.. [6] To enable RAM load, assign the "RAM_LOAD" string to the
``MCUBOOT_UPGRADE_STRATEGY`` configuration variable in the build
configuration file, or include this macro definition in the command line
@@ -343,7 +343,7 @@ MCUBoot related compile time switches can be set by cmake variables.
- **"SWAP":** Activate swapping firmware upgrade operation.
- **"DIRECT_XIP":** Activate direct execute-in-place firmware upgrade
operation.
- - **"RAM_LOADING":** Activate RAM loading firmware upgrade operation, where
+ - **"RAM_LOAD":** Activate RAM loading firmware upgrade operation, where
the latest image is copied to RAM and runs from there instead of being
executed in-place.
- MCUBOOT_SIGNATURE_TYPE (default: RSA):
@@ -751,7 +751,7 @@ Executing firmware upgrade on CoreLink SSE-200 Subsystem for MPS3 (AN524)
RAM loading firmware upgrade
============================
-To enable RAM loading, please set ``MCUBOOT_UPGRADE_STRATEGY`` to "RAM_LOADING"
+To enable RAM loading, please set ``MCUBOOT_UPGRADE_STRATEGY`` to "RAM_LOAD"
(either in the configuration file or through the command line), and then specify
a destination load address in RAM where the image can be copied to and executed
from. The ``IMAGE_LOAD_ADDRESS`` macro must be specified in the target dependent
diff --git a/platform/ext/readme.rst b/platform/ext/readme.rst
index 52e14da772..59f77559af 100644
--- a/platform/ext/readme.rst
+++ b/platform/ext/readme.rst
@@ -174,11 +174,11 @@ updatable images with the related flash areas that hold the firmware images:
- ``IMAGE_EXECUTABLE_RAM_START`` - Defines the start of the region to which
images are allowed to be loaded. Only used if ``MCUBOOT_UPGRADE_STRATEGY`` is
- configured to be ``RAM_LOADING``.
+ configured to be ``RAM_LOAD``.
- ``IMAGE_EXECUTABLE_RAM_SIZE`` - Defines the size of the region to which images
are allowed to be loaded. Only used if ``MCUBOOT_UPGRADE_STRATEGY`` is
- configured to be ``RAM_LOADING``.
+ configured to be ``RAM_LOAD``.
Assemble tool
^^^^^^^^^^^^^
@@ -200,7 +200,7 @@ binary. It requires the following definition:
- ``IMAGE_LOAD_ADDRESS`` - Defines the address to where the image is loaded and
is executed from. Only used if ``MCUBOOT_UPGRADE_STRATEGY`` is configured to
- be ``RAM_LOADING``.
+ be ``RAM_LOAD``.
Protected Storage (PS) Service definitions
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
diff --git a/platform/ext/target/mps3/an524/config.cmake b/platform/ext/target/mps3/an524/config.cmake
index a306908a2e..0001bb507f 100644
--- a/platform/ext/target/mps3/an524/config.cmake
+++ b/platform/ext/target/mps3/an524/config.cmake
@@ -6,7 +6,7 @@
#-------------------------------------------------------------------------------
set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)
-set(MCUBOOT_UPGRADE_STRATEGY "DIRECT_XIP" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]" FORCE)
+set(MCUBOOT_UPGRADE_STRATEGY "DIRECT_XIP" CACHE STRING "Upgrade strategy for images [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOAD]" FORCE)
################################## Dependencies ################################
diff --git a/platform/ext/target/musca_a/config.cmake b/platform/ext/target/musca_a/config.cmake
index 1cb242686e..56392a6b06 100644
--- a/platform/ext/target/musca_a/config.cmake
+++ b/platform/ext/target/musca_a/config.cmake
@@ -5,5 +5,5 @@
#
#-------------------------------------------------------------------------------
-set(MCUBOOT_UPGRADE_STRATEGY "RAM_LOADING" CACHE STRING "Upgrade strategy when multiple boot images are loaded [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOADING]" FORCE)
-set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)
+set(MCUBOOT_UPGRADE_STRATEGY "RAM_LOAD" CACHE STRING "Upgrade strategy when multiple boot images are loaded [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOAD]" FORCE)
+set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)