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authorJamie Fox <jamie.fox@arm.com>2020-02-17 18:07:57 +0000
committerJamie Fox <jamie.fox@arm.com>2020-04-20 20:04:33 +0100
commit8e65396ab232550892c682f6930a4e949247466e (patch)
treed375f1f517b8c01e009019fd476f01bebf8c93ee
parentd4c3c7435cab9943a12b1d4e2222b2ef75d20381 (diff)
downloadtrusted-firmware-m-8e65396ab232550892c682f6930a4e949247466e.tar.gz
Core: Remove fixed NS region numbers
Removes the fixed NS region number definition from TF-M. Refactors all existing platforms to number SAU regions sequentially rather than use fixed numbers. Change-Id: I54536b0327b87c8aee933f4bbf99b5dac396f3c5 Signed-off-by: Jamie Fox <jamie.fox@arm.com>
-rw-r--r--platform/ext/target/mps2/an519/target_cfg.c49
-rw-r--r--platform/ext/target/mps2/an521/target_cfg.c56
-rw-r--r--platform/ext/target/mps2/an539/target_cfg.c11
-rw-r--r--platform/ext/target/mps3/an524/target_cfg.c11
-rw-r--r--platform/ext/target/musca_a/target_cfg.c9
-rw-r--r--platform/ext/target/musca_b1/target_cfg.c11
-rw-r--r--platform/ext/target/musca_s1/target_cfg.c9
-rw-r--r--platform/ext/target/sse-200_aws/target_cfg.c45
-rw-r--r--secure_fw/core/include/tfm_secure_api.h9
9 files changed, 89 insertions, 121 deletions
diff --git a/platform/ext/target/mps2/an519/target_cfg.c b/platform/ext/target/mps2/an519/target_cfg.c
index acb72421b..6944ebb94 100644
--- a/platform/ext/target/mps2/an519/target_cfg.c
+++ b/platform/ext/target/mps2/an519/target_cfg.c
@@ -19,7 +19,6 @@
#include "Driver_MPC.h"
#include "platform_retarget_dev.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -250,71 +249,65 @@ enum tfm_plat_err_t nvic_interrupt_enable(void)
}
/*------------------- SAU/IDAU configuration functions -----------------------*/
-
struct sau_cfg_t {
- uint32_t RNR;
uint32_t RBAR;
uint32_t RLAR;
+ bool nsc;
};
const struct sau_cfg_t sau_cfg[] = {
{
- TFM_NS_REGION_CODE,
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base)),
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) +
- NS_PARTITION_SIZE - 1)
+ NS_PARTITION_SIZE - 1),
+ false,
},
{
- TFM_NS_REGION_DATA,
NS_DATA_START,
- NS_DATA_LIMIT
+ NS_DATA_LIMIT,
+ false,
},
{
- TFM_NS_REGION_VENEER,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Base),
- (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit)
+ (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit),
+ true,
},
{
- TFM_NS_REGION_PERIPH_1,
PERIPHERALS_BASE_NS_START,
#ifdef SECURE_UART1
- (UART1_BASE_NS - 1)
+ (UART1_BASE_NS - 1),
+ false,
},
{
- TFM_NS_REGION_PERIPH_2,
UART2_BASE_NS,
#endif
- PERIPHERALS_BASE_NS_END
- }
+ PERIPHERALS_BASE_NS_END,
+ false,
+ },
#ifdef BL2
- ,
{
- TFM_NS_SECONDARY_IMAGE_REGION,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base),
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base) +
- SECONDARY_PARTITION_SIZE - 1
- }
+ SECONDARY_PARTITION_SIZE - 1,
+ false,
+ },
#endif
};
void sau_and_idau_cfg(void)
{
- int32_t i;
- struct spctrl_def* spctrl = CMSDK_SPCTRL;
+ struct spctrl_def *spctrl = CMSDK_SPCTRL;
+ uint32_t i;
/* Enables SAU */
TZ_SAU_Enable();
for (i = 0; i < ARRAY_SIZE(sau_cfg); i++) {
- SAU->RNR = sau_cfg[i].RNR;
+ SAU->RNR = i;
SAU->RBAR = sau_cfg[i].RBAR & SAU_RBAR_BADDR_Msk;
- if (sau_cfg[i].RNR == TFM_NS_REGION_VENEER) {
- SAU->RLAR = sau_cfg[i].RLAR | SAU_RLAR_ENABLE_Msk |
- SAU_RLAR_NSC_Msk;
- } else {
- SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
- SAU_RLAR_ENABLE_Msk;
- }
+ SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
+ (sau_cfg[i].nsc ? SAU_RLAR_NSC_Msk : 0U) |
+ SAU_RLAR_ENABLE_Msk;
}
/* Allows SAU to define the code region as a NSC */
diff --git a/platform/ext/target/mps2/an521/target_cfg.c b/platform/ext/target/mps2/an521/target_cfg.c
index 78938c341..897bd08df 100644
--- a/platform/ext/target/mps2/an521/target_cfg.c
+++ b/platform/ext/target/mps2/an521/target_cfg.c
@@ -19,7 +19,6 @@
#include "Driver_MPC.h"
#include "platform_retarget_dev.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -316,81 +315,76 @@ enum tfm_plat_err_t nvic_interrupt_enable(void)
/*------------------- SAU/IDAU configuration functions -----------------------*/
struct sau_cfg_t {
- uint32_t RNR;
uint32_t RBAR;
uint32_t RLAR;
+ bool nsc;
};
const struct sau_cfg_t sau_cfg[] = {
{
- TFM_NS_REGION_CODE,
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base)),
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) +
- NS_PARTITION_SIZE - 1)
+ NS_PARTITION_SIZE - 1),
+ false,
},
{
- TFM_NS_REGION_DATA,
NS_DATA_START,
- NS_DATA_LIMIT
+ NS_DATA_LIMIT,
+ false,
},
{
- TFM_NS_REGION_VENEER,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Base),
- (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit)
+ (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit),
+ true,
},
{
- TFM_NS_REGION_PERIPH_1,
PERIPHERALS_BASE_NS_START,
#if (defined(SECURE_UART1) && defined(PSA_FF_TEST_SECURE_UART2))
- (UART1_BASE_NS - 1)
+ (UART1_BASE_NS - 1),
+ false,
},
{
- TFM_NS_REGION_PERIPH_2,
UART3_BASE_NS,
#elif defined(PSA_FF_TEST_SECURE_UART2)
- (UART2_BASE_NS - 1)
+ (UART2_BASE_NS - 1),
+ false,
},
{
- TFM_NS_REGION_PERIPH_2,
UART3_BASE_NS,
#elif defined(SECURE_UART1)
- (UART1_BASE_NS - 1)
+ (UART1_BASE_NS - 1),
+ false,
},
{
- TFM_NS_REGION_PERIPH_2,
UART2_BASE_NS,
#endif
- PERIPHERALS_BASE_NS_END
- }
+ PERIPHERALS_BASE_NS_END,
+ false,
+ },
#ifdef BL2
- ,
{
- TFM_NS_SECONDARY_IMAGE_REGION,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base),
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base) +
- SECONDARY_PARTITION_SIZE - 1
- }
+ SECONDARY_PARTITION_SIZE - 1,
+ false,
+ },
#endif
};
void sau_and_idau_cfg(void)
{
- struct spctrl_def* spctrl = CMSDK_SPCTRL;
- int32_t i;
+ struct spctrl_def *spctrl = CMSDK_SPCTRL;
+ uint32_t i;
/* Enables SAU */
TZ_SAU_Enable();
for (i = 0; i < ARRAY_SIZE(sau_cfg); i++) {
- SAU->RNR = sau_cfg[i].RNR;
+ SAU->RNR = i;
SAU->RBAR = sau_cfg[i].RBAR & SAU_RBAR_BADDR_Msk;
- if (sau_cfg[i].RNR == TFM_NS_REGION_VENEER) {
- SAU->RLAR = sau_cfg[i].RLAR | SAU_RLAR_ENABLE_Msk |
- SAU_RLAR_NSC_Msk;
- } else {
- SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
- SAU_RLAR_ENABLE_Msk;
- }
+ SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
+ (sau_cfg[i].nsc ? SAU_RLAR_NSC_Msk : 0U) |
+ SAU_RLAR_ENABLE_Msk;
}
/* Allows SAU to define the code region as a NSC */
diff --git a/platform/ext/target/mps2/an539/target_cfg.c b/platform/ext/target/mps2/an539/target_cfg.c
index b59c90bc7..83b00c917 100644
--- a/platform/ext/target/mps2/an539/target_cfg.c
+++ b/platform/ext/target/mps2/an539/target_cfg.c
@@ -20,7 +20,6 @@
#include "device_definition.h"
#include "platform_description.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "mpu_armv8m_drv.h"
#include "secure_utilities.h"
#include "tfm_plat_defs.h"
@@ -270,30 +269,30 @@ void sau_and_idau_cfg(void)
TZ_SAU_Enable();
/* Configures SAU regions to be non-secure */
- SAU->RNR = TFM_NS_REGION_CODE;
+ SAU->RNR = 0U;
SAU->RBAR = (memory_regions.non_secure_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.non_secure_partition_limit
& SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
- SAU->RNR = TFM_NS_REGION_DATA;
+ SAU->RNR = 1U;
SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
/* Configures veneers region to be non-secure callable */
- SAU->RNR = TFM_NS_REGION_VENEER;
+ SAU->RNR = 2U;
SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk | SAU_RLAR_NSC_Msk;
/* Configure the peripherals space */
- SAU->RNR = TFM_NS_REGION_PERIPH_1;
+ SAU->RNR = 3U;
SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
#ifdef BL2
/* Secondary image partition */
- SAU->RNR = TFM_NS_SECONDARY_IMAGE_REGION;
+ SAU->RNR = 4U;
SAU->RBAR = (memory_regions.secondary_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.secondary_partition_limit
diff --git a/platform/ext/target/mps3/an524/target_cfg.c b/platform/ext/target/mps3/an524/target_cfg.c
index 1fd93c6eb..11b6884b5 100644
--- a/platform/ext/target/mps3/an524/target_cfg.c
+++ b/platform/ext/target/mps3/an524/target_cfg.c
@@ -20,7 +20,6 @@
#include "device_definition.h"
#include "platform_description.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "mpu_armv8m_drv.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -270,30 +269,30 @@ void sau_and_idau_cfg(void)
TZ_SAU_Enable();
/* Configures SAU regions to be non-secure */
- SAU->RNR = TFM_NS_REGION_CODE;
+ SAU->RNR = 0U;
SAU->RBAR = (memory_regions.non_secure_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.non_secure_partition_limit
& SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
- SAU->RNR = TFM_NS_REGION_DATA;
+ SAU->RNR = 1U;
SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
/* Configures veneers region to be non-secure callable */
- SAU->RNR = TFM_NS_REGION_VENEER;
+ SAU->RNR = 2U;
SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk | SAU_RLAR_NSC_Msk;
/* Configure the peripherals space */
- SAU->RNR = TFM_NS_REGION_PERIPH_1;
+ SAU->RNR = 3U;
SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
#ifdef BL2
/* Secondary image partition */
- SAU->RNR = TFM_NS_SECONDARY_IMAGE_REGION;
+ SAU->RNR = 4U;
/* TODO */
SAU->RBAR = (memory_regions.secondary_partition_base
& SAU_RBAR_BADDR_Msk);
diff --git a/platform/ext/target/musca_a/target_cfg.c b/platform/ext/target/musca_a/target_cfg.c
index bf39090b6..06ebd44a1 100644
--- a/platform/ext/target/musca_a/target_cfg.c
+++ b/platform/ext/target/musca_a/target_cfg.c
@@ -19,7 +19,6 @@
#include "platform_description.h"
#include "device_definition.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -291,26 +290,26 @@ void sau_and_idau_cfg(void)
TZ_SAU_Enable();
/* Configures SAU regions to be non-secure */
- SAU->RNR = TFM_NS_REGION_CODE;
+ SAU->RNR = 0U;
SAU->RBAR = (memory_regions.non_secure_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.non_secure_partition_limit
& SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
- SAU->RNR = TFM_NS_REGION_DATA;
+ SAU->RNR = 1U;
SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
/* Configures veneers region to be non-secure callable */
- SAU->RNR = TFM_NS_REGION_VENEER;
+ SAU->RNR = 2U;
SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk
| SAU_RLAR_NSC_Msk;
/* Configure the peripherals space */
- SAU->RNR = TFM_NS_REGION_PERIPH_1;
+ SAU->RNR = 3U;
SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
diff --git a/platform/ext/target/musca_b1/target_cfg.c b/platform/ext/target/musca_b1/target_cfg.c
index 87ff9b76d..f7a040437 100644
--- a/platform/ext/target/musca_b1/target_cfg.c
+++ b/platform/ext/target/musca_b1/target_cfg.c
@@ -20,7 +20,6 @@
#include "platform_description.h"
#include "device_definition.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -333,33 +332,33 @@ void sau_and_idau_cfg(void)
TZ_SAU_Enable();
/* Configures SAU regions to be non-secure */
- SAU->RNR = TFM_NS_REGION_CODE;
+ SAU->RNR = 0U;
SAU->RBAR = (memory_regions.non_secure_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.non_secure_partition_limit
& SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
- SAU->RNR = TFM_NS_REGION_DATA;
+ SAU->RNR = 1U;
SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
/* Configures veneers region to be non-secure callable */
- SAU->RNR = TFM_NS_REGION_VENEER;
+ SAU->RNR = 2U;
SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk
| SAU_RLAR_NSC_Msk;
/* Configure the peripherals space */
- SAU->RNR = TFM_NS_REGION_PERIPH_1;
+ SAU->RNR = 3U;
SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
#ifdef BL2
/* Secondary image partition */
- SAU->RNR = TFM_NS_SECONDARY_IMAGE_REGION;
+ SAU->RNR = 4U;
SAU->RBAR = (memory_regions.secondary_partition_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.secondary_partition_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
diff --git a/platform/ext/target/musca_s1/target_cfg.c b/platform/ext/target/musca_s1/target_cfg.c
index b2c9d9adf..e47f4319e 100644
--- a/platform/ext/target/musca_s1/target_cfg.c
+++ b/platform/ext/target/musca_s1/target_cfg.c
@@ -20,7 +20,6 @@
#include "platform_description.h"
#include "device_definition.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -277,26 +276,26 @@ void sau_and_idau_cfg(void)
TZ_SAU_Enable();
/* Configures SAU regions to be non-secure */
- SAU->RNR = TFM_NS_REGION_CODE;
+ SAU->RNR = 0U;
SAU->RBAR = (memory_regions.non_secure_partition_base
& SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.non_secure_partition_limit
& SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
- SAU->RNR = TFM_NS_REGION_DATA;
+ SAU->RNR = 1U;
SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk;
/* Configures veneers region to be non-secure callable */
- SAU->RNR = TFM_NS_REGION_VENEER;
+ SAU->RNR = 2U;
SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk
| SAU_RLAR_NSC_Msk;
/* Configure the peripherals space */
- SAU->RNR = TFM_NS_REGION_PERIPH_1;
+ SAU->RNR = 3U;
SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk);
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
diff --git a/platform/ext/target/sse-200_aws/target_cfg.c b/platform/ext/target/sse-200_aws/target_cfg.c
index 5673a2d2c..1bfb38817 100644
--- a/platform/ext/target/sse-200_aws/target_cfg.c
+++ b/platform/ext/target/sse-200_aws/target_cfg.c
@@ -19,7 +19,6 @@
#include "Driver_MPC.h"
#include "platform_retarget_dev.h"
#include "region_defs.h"
-#include "tfm_secure_api.h"
#include "tfm_plat_defs.h"
#include "region.h"
@@ -239,61 +238,57 @@ enum tfm_plat_err_t nvic_interrupt_enable(void)
/*------------------- SAU/IDAU configuration functions -----------------------*/
struct sau_cfg_t {
- uint32_t RNR;
uint32_t RBAR;
uint32_t RLAR;
+ bool nsc;
};
const struct sau_cfg_t sau_cfg[] = {
{
- TFM_NS_REGION_CODE,
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base)),
((uint32_t)&REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) +
- NS_PARTITION_SIZE - 1)
+ NS_PARTITION_SIZE - 1),
+ false,
},
{
- TFM_NS_REGION_DATA,
NS_DATA_START,
- NS_DATA_LIMIT
+ NS_DATA_LIMIT,
+ false,
},
{
- TFM_NS_REGION_VENEER,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Base),
- (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit)
+ (uint32_t)&REGION_NAME(Load$$LR$$, LR_VENEER, $$Limit),
+ true,
},
{
- TFM_NS_REGION_PERIPH_1,
PERIPHERALS_BASE_NS_START,
- PERIPHERALS_BASE_NS_END
- }
+ PERIPHERALS_BASE_NS_END,
+ false,
+ },
#ifdef BL2
- ,
{
- TFM_NS_SECONDARY_IMAGE_REGION,
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base),
(uint32_t)&REGION_NAME(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base) +
- SECONDARY_PARTITION_SIZE - 1
- }
+ SECONDARY_PARTITION_SIZE - 1,
+ false,
+ },
#endif
};
void sau_and_idau_cfg(void)
{
- struct spctrl_def* spctrl = CMSDK_SPCTRL;
- int32_t i;
+ struct spctrl_def *spctrl = CMSDK_SPCTRL;
+ uint32_t i;
/* Enables SAU */
TZ_SAU_Enable();
+
for (i = 0; i < ARRAY_SIZE(sau_cfg); i++) {
- SAU->RNR = sau_cfg[i].RNR;
+ SAU->RNR = i;
SAU->RBAR = sau_cfg[i].RBAR & SAU_RBAR_BADDR_Msk;
- if (sau_cfg[i].RNR == TFM_NS_REGION_VENEER) {
- SAU->RLAR = sau_cfg[i].RLAR | SAU_RLAR_ENABLE_Msk |
- SAU_RLAR_NSC_Msk;
- } else {
- SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
- SAU_RLAR_ENABLE_Msk;
- }
+ SAU->RLAR = (sau_cfg[i].RLAR & SAU_RLAR_LADDR_Msk) |
+ (sau_cfg[i].nsc ? SAU_RLAR_NSC_Msk : 0U) |
+ SAU_RLAR_ENABLE_Msk;
}
/* Allows SAU to define the code region as a NSC */
diff --git a/secure_fw/core/include/tfm_secure_api.h b/secure_fw/core/include/tfm_secure_api.h
index c4559898e..9dad14874 100644
--- a/secure_fw/core/include/tfm_secure_api.h
+++ b/secure_fw/core/include/tfm_secure_api.h
@@ -60,15 +60,6 @@ struct tfm_sfn_req_s {
bool ns_caller;
};
-enum tfm_ns_region_e {
- TFM_NS_REGION_CODE = 0,
- TFM_NS_REGION_DATA,
- TFM_NS_REGION_VENEER,
- TFM_NS_REGION_PERIPH_1,
- TFM_NS_REGION_PERIPH_2,
- TFM_NS_SECONDARY_IMAGE_REGION,
-};
-
enum tfm_memory_access_e {
TFM_MEMORY_ACCESS_RO = 1,
TFM_MEMORY_ACCESS_RW = 2,