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author | Vishnu Banavath <vishnu.banavath@arm.com> | 2020-03-14 14:46:06 +0000 |
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committer | Vishnu Banavath <vishnu.banavath@arm.com> | 2020-07-22 09:25:45 +0100 |
commit | 0b572be0b231f649ea26659270b02e0e92146ef3 (patch) | |
tree | a54870e6e7a1b3e8a96dab19af5f5a59c58a7a7a | |
parent | dcc1ef71eebdaa02d03f304993e3f8327ba63758 (diff) | |
download | trusted-firmware-m-0b572be0b231f649ea26659270b02e0e92146ef3.tar.gz |
Build: Compile the cc312 driver for Cortex-M0+ host processor
These change are made to provide an option to build
CC312 hardware crypto driver for cortex-m0plus host processor.
Change-Id: I614d8901aa55617aab72a9f83f0b8faa039a3f2a
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-rw-r--r-- | lib/ext/cryptocell-312-runtime/host/Makefile.defs | 16 | ||||
-rw-r--r-- | platform/ext/common/cc312/cc312.c | 9 | ||||
-rw-r--r-- | platform/ext/common/cc312/cc312_proj_cfg.mk.in | 23 |
3 files changed, 47 insertions, 1 deletions
diff --git a/lib/ext/cryptocell-312-runtime/host/Makefile.defs b/lib/ext/cryptocell-312-runtime/host/Makefile.defs index 14b03b48ab..75c1ccce10 100644 --- a/lib/ext/cryptocell-312-runtime/host/Makefile.defs +++ b/lib/ext/cryptocell-312-runtime/host/Makefile.defs @@ -179,6 +179,13 @@ ifeq ($(ARCH),arm) CFLAGS += -march=armv8-m.main CFLAGS += -mcmse CFLAGS += -DARCH_V8M + else ifeq ($(ARM_CPU), cortex-m3) + # For arm-none-eabi assume cortex-m3 + ARM_CPU ?= cortex-m3 + CFLAGS += -mcpu=$(ARM_CPU) + else ifeq ($(ARM_CPU), cortex-m0plus) + ARM_CPU ?= cortex-m0plus + CFLAGS += -mcpu=$(ARM_CPU) else $(error unrecognized ARM_CPU "$(ARM_CPU)") endif @@ -194,6 +201,12 @@ ifeq ($(ARCH),arm) CFLAGS += -mcmse CFLAGS += -mfpu=none CFLAGS += -DARCH_V8M + else ifeq ($(ARM_CPU), cortex-m3) + ARM_CPU ?= cortex-m3 + CFLAGS += -mcpu=$(ARM_CPU) + else ifeq ($(ARM_CPU), cortex-m0plus) + ARM_CPU ?= cortex-m0plus + CFLAGS += -mcpu=$(ARM_CPU) else $(error unrecognized ARM_CPU "$(ARM_CPU)") endif @@ -320,6 +333,9 @@ endif ifeq ($(ARM_CPU),cortex-m3) TESTAL_PAL_ARCH = cm3 endif +ifeq ($(ARM_CPU),cortex-m0plus) +TESTAL_PAL_ARCH = cm0plus +endif ifeq ($(ARM_CPU),cortex-m33) TESTAL_PAL_ARCH = cm33 endif diff --git a/platform/ext/common/cc312/cc312.c b/platform/ext/common/cc312/cc312.c index 503110f923..400260ef52 100644 --- a/platform/ext/common/cc312/cc312.c +++ b/platform/ext/common/cc312/cc312.c @@ -20,6 +20,8 @@ #include "prod_hw_defs.h" #include "cc_otp_defs.h" +#include "region_defs.h" + #define CC312_NULL_CONTEXT "NO SALT!" CCRndContext_t* CC312_pRndCtx = NULL; @@ -34,9 +36,16 @@ CCError_t CC_PalDataBufferAttrGet(const unsigned char *pDataBuffer, CC_UNUSED_PARAM(buffType); *pBuffNs = DATA_BUFFER_IS_SECURE; +#if defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8M_BASE__) if (cmse_check_address_range((void*)pDataBuffer, buffSize, CMSE_NONSECURE)) { *pBuffNs = DATA_BUFFER_IS_NONSECURE; } +#else + if (pDataBuffer >= (uint8_t *)NS_DATA_START && + (pDataBuffer + buffSize) <= (uint8_t *)NS_DATA_LIMIT) { + *pBuffNs = DATA_BUFFER_IS_NONSECURE; + } +#endif return CC_OK; } diff --git a/platform/ext/common/cc312/cc312_proj_cfg.mk.in b/platform/ext/common/cc312/cc312_proj_cfg.mk.in index 1461e98d35..8bca32962e 100644 --- a/platform/ext/common/cc312/cc312_proj_cfg.mk.in +++ b/platform/ext/common/cc312/cc312_proj_cfg.mk.in @@ -1,5 +1,5 @@ #------------------------------------------------------------------------------- -# Copyright (c) 2019, Arm Limited. All rights reserved. +# Copyright (c) 2019-2020, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -13,9 +13,30 @@ HOST_LIBNAME = cc3x_lib TEE_OS = no_os REE_OS = no_os + +HOST_ARM_CPU_TYPE = "@ARM_CPU_TYPE@" + +ifeq ($(HOST_ARM_CPU_TYPE),) +$(error HOST_ARM_CPU_TYPE is NULL) +endif + +ifeq ($(HOST_ARM_CPU_TYPE), "Cortex-M33") CORTEX = cortex-m33 ARM_CPU = cortex-m33 M_ARCH=armv8-m.main +endif + +ifeq ($(HOST_ARM_CPU_TYPE), "Cortex-M0p") +CORTEX = Cortex-M0plus +ARM_CPU = cortex-m0plus +M_ARCH=armv6-m +endif + +ifeq ($(HOST_ARM_CPU_TYPE), "Cortex-M3") +CORTEX = Cortex-M3 +ARM_CPU = cortex-m3 +M_ARCH=armv7-m +endif PROJ_CFG_NAME = '' CC_HW_VERSION = 0xFF |