diff options
author | Summer Qin <summer.qin@arm.com> | 2019-01-07 19:06:04 +0800 |
---|---|---|
committer | Edison Ai <edison.ai@arm.com> | 2019-01-26 10:31:44 +0800 |
commit | 3349c94c5cfd992ec107965b19dbcfb452b2040b (patch) | |
tree | b6d1f91dde0c6b9aae33f2e5a4eec4e1b6e17401 | |
parent | 764d41fbbdbffd568162cf97067394ae66c51695 (diff) | |
download | trusted-firmware-m-3349c94c5cfd992ec107965b19dbcfb452b2040b.tar.gz |
Platform: Align region name in armclang and gcc
Add one region ER_TFM_DATA in gcc linker script.
Change-Id: I6022d4556bc62cca5dc74eb3e7c0ed6093ee5d78
Signed-off-by: Summer Qin <summer.qin@arm.com>
8 files changed, 24 insertions, 0 deletions
diff --git a/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld b/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld index ee8ff7bc00..67da77c481 100644 --- a/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld +++ b/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld @@ -888,6 +888,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld.template b/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld.template index dbaea18a9f..0480810155 100644 --- a/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld.template +++ b/platform/ext/target/mps2/an519/gcc/mps2_an519_s.ld.template @@ -424,6 +424,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld b/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld index b6c5628949..f0066d9cab 100644 --- a/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld +++ b/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld @@ -888,6 +888,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld.template b/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld.template index ede4b2b5b0..e1f12bbe36 100644 --- a/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld.template +++ b/platform/ext/target/mps2/an521/gcc/mps2_an521_s.ld.template @@ -424,6 +424,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld b/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld index ee8ff7bc00..67da77c481 100644 --- a/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld +++ b/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld @@ -888,6 +888,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld.template b/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld.template index dbaea18a9f..0480810155 100644 --- a/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld.template +++ b/platform/ext/target/musca_a/Device/Source/gcc/musca_s.ld.template @@ -424,6 +424,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld b/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld index 9cce586756..dac98326e0 100644 --- a/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld +++ b/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld @@ -888,6 +888,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set diff --git a/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld.template b/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld.template index 461862d60b..fd81036ef3 100644 --- a/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld.template +++ b/platform/ext/target/musca_b1/Device/Source/gcc/musca_s.ld.template @@ -424,6 +424,9 @@ SECTIONS Image$$TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); Image$$TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); + Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); + /* * Place the CMSE Veneers (containing the SG instruction) after the code, in a * separate 32 bytes aligned region so that the SAU can programmed to just set |