/* * Copyright (c) 2019-2020, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /dts-v1/; / { model = "V2F-1XV7 Cortex-A7x1 SMM"; compatible = "arm,vexpress,v2f-1xv7", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; cpus { #address-cells = <2>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0 0>; }; }; memory@0,80000000 { device_type = "memory"; reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */ }; gic: interrupt-controller@2c001000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0 0x2c001000 0 0x1000>, <0 0x2c002000 0 0x1000>, <0 0x2c004000 0 0x2000>, <0 0x2c006000 0 0x2000>; interrupts = <1 9 0xf04>; }; smbclk: refclk24mhzx2 { /* Reference 24MHz clock x 2 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; clock-output-names = "smclk"; }; smb { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, <3 0 0 0x1c000000 0x04000000>, <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, <0 0 2 &gic 0 2 4>, <0 0 3 &gic 0 3 4>, <0 0 4 &gic 0 4 4>, <0 0 5 &gic 0 5 4>, <0 0 42 &gic 0 42 4>; #include "rtsm_ve-motherboard-aarch32.dtsi" }; };