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2023-12-01feat(mt8188): add secure iommu supportkiwi liu
The secure IOMMU has two secure banks: VDO and VPP. Add SiP call to report the secure bank status in debug build. About more background, please see: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/include/dt-bindings/memory/mediatek,mt8188-memory-port.h?id=d5cda142d649c690fb0fcf1e29f3df63fbafc442 Change-Id: I7b3319e84391fc6d7f456659f8b8c5d9d1c6ab9d Signed-off-by: Anan Sun <anan.sun@mediatek.corp-partner.google.com> Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
2023-11-16feat(mediatek): remove bl32 flag for mtk_blHsin-Hsiung Wang
Currently MediaTek platform code does not support the bl32 image. Remove bl32 support from Makefile to prevent the build failure when NEED_BL32 build flag is enabled. Change-Id: Id8d5663ea5c537390f8ff3ccb427a3a63266545e Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
2023-10-25Merge "feat(mt8195): increase TZRAM" into integrationOlivier Deprez
2023-10-11feat(mt8188): add EMI MPU support for SCP and DSPJason Chen
1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF. 2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF. 3. Allow domain D4 (DSP) access to the region 0x60000000~0x610FFFFF. Change-Id: Iea92eebaea4d7dd2968cf51f41d07c2479168e7e Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-10-03feat(mt8188): add DSB before udelayKarl Li
To ensure that all explicit memory accesses are complete before udelay, insert dsb before udelay. Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-09-27feat(mt8188): update return value in mtk_emi_mpu_sip_handlerDawei Chien
Remove the use of SMC_RET2 in the mtk_emi_mpu_sip_handler function. The current smc driver in the atf driver has switched to using SMC_RET4 for smc call clients. This change aligns the return value handling with the updated driver behavior that ensures consistency and avoids potential issues with the old return value. Change-Id: I87f25b438d2119837c45bed80a8224fcfd141fb6 Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-09-12chore: remove MULTI_CONSOLE_API referencesMichal Simek
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99 ("Remove MULTI_CONSOLE_API flag and references to it") that's why remove references in platform.mk files and also in one rst which is not valid anymore. Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657 Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-08-14feat(mt8188): add support for SMC from OP-TEEDawei Chien
- Add MTK_SIP_SMC_FROM_S_EL1_TABLE to handle the SMC call from OP-TEE. - Register optee for EMI MPU. Change-Id: Ie94542f0e3966c4c25f2b7233b9355d41f8f36a5 Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-07-14feat(mt8188): modify APU DAPC permissionChungying Lu
We limited the r/w permission of some register groups for security concerns. These regitser groups should not be accessed by domain 3 or domain 5. Change-Id: I2188da88d9e10a931d87bda14dc7dca46633dcd8 Signed-off-by: Chungying Lu <chungying.lu@mediatek.corp-partner.google.com>
2023-06-28feat(mt8195): increase TZRAMYi Chou
We need 4k more memory. Change-Id: I760e949c2f80a79e111060b24855c0a6a5bfdfaa Signed-off-by: Yi Chou <yich@google.com>
2023-06-06fix(mediatek): support saving/restoring GICR registersFengquan Chen
The GICR_IPRIORITYR[x] registers are not saved or restored in the original design. When the kernel tries to use them, such as the pseudo-NMI, it leads crashes and freezes. This patch adds support for saving/restoring GICR registers. Change-Id: I9718a75a1410ca14826710dfdf5f3226299fa6e2 Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-06-06feat(mediatek): add APU watchdog timeout controlChungying Lu
Add APU watchdog timeout control. Change-Id: I21d65a88d20b6b2752a75f74487b5fe6596ebdf7 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06feat(mt8188): add emi mpu protection for APU secure memoryChungying Lu
Add emi mpu protection of APU secure memory. Change-Id: I949cfce97565d8a313caae4ea41af60a171042a6 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06feat(mt8188): add devapc setting of apusys rcxKarl Li
Apusys rcx is a subsys in apusys, and it is a basic domain of APU and it connects several components in APU. The devapc control of apusys rcx is also inside APU and it can only be set when APU is powered on. Then apusys kernel driver will trigger rcx devapc init by ATF smc call. Change-Id: If4249f22a08690b1e4f5aa5f0cbfb54ccacf90e1 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06feat(mt8188): add backup/restore function when power on/offChungying Lu
Add APU backup/restore function when power on/off. Change-Id: Id0451bd12f402e1acabeb5c12266a2e01836e9dd Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06feat(mediatek): add APU bootup control smc callChungying Lu
Add APU bootup control smc call. The steps of bootup flow: 1. set up APU config. 2. reset APU. 3. set up APU boot config. 4. boot APU. Change-Id: I9e930070a64c7c4dcaa3a8b3d28b897823e9f53c Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06feat(mt8188): enable apusys mailbox mpu protectKarl Li
Enable apusys mailbox mpu protect. Change-Id: Idbf67084037b7ecf4926f57a901075f98540ee57 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06feat(mt8188): enable apusys domain remapKarl Li
Enable apusys domain remap to protect no-protect memory. - Remap request which from domain 5 to domain 14. - Remap request which from domain 7 to domain 14. Change-Id: Iccd188e3b8edbe916fa9767c841a844b66c6011f Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06feat(mt8188): add apusys ao devapc settingKarl Li
Apusys ao devapc is a set of control registers inside APU, and it controls the access permission of APU ao domain. Moreover, apusys ao devapc must be set after apusys power init, so we need to place the drivers in TF-A instead of coreboot. Change-Id: Ife849c32d4dd9dca15432d4b8a51753fde61b148 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06feat(mt8188): increase TZRAM_SIZE from 192KB to 256KBKarl Li
Increase TZRAM_SIZE to 256KB for MT8188 APUSYS. Change-Id: Iabe1a4aeb79ba23c3e963170a8eb9ce19f2925f3 Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-05-09Merge changes I1bfa797e,I0ec7a70e into integrationManish Pandey
* changes: fix(tree): correct some typos fix(rockchip): use semicolon instead of comma
2023-05-09fix(tree): correct some typosElyes Haouas
found using codespell (https://github.com/codespell-project/codespell). Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
2023-05-08feat(mt8188): add MT8188 SPM debug logsJason Chen
Add debug logs for tracking the status of suspend and resume. Change-Id: Id2d2ab06fadb3118ab66f816937e0dd6e43dbdc3 Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-04-06feat(mt8188): add apu power on/off controlChungying Lu
Add mt8188 apu power on/off control Change-Id: I8e28bf7a4ad4067553981c67c4c2225fdd802859 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
2023-03-29Merge "feat(mediatek): add APU init flow" into integrationMark Dykes
2023-03-29feat(mediatek): add APU init flowChungying Lu
The patch brings preparation steps before powering on APU (AI processing unit) Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-03-27refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1Andre Przywara
So far we have the ENABLE_AMU build option to include AMU register handling code for enabling and context switch. There is also an ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system register handling. The latter needs some alignment with the new feature scheme, but it conceptually overlaps with the ENABLE_AMU option. Since there is no real need for two separate options, unify both into a new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at this point, a subsequent patch will make use of the new feature handling scheme. Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-21Merge changes I924ea85d,I22e128c4,I7a5cfaac into integrationOlivier Deprez
* changes: feat(mt8195): add support for SMC from OP-TEE feat(mediatek): add SMC handler for EMI MPU feat(mediatek): add SiP service for OP-TEE
2023-03-21feat(mt8195): add support for SMC from OP-TEEBo-Chen Chen
- Add MTK_SIP_SMC_FROM_S_EL1_TABLE to handle the SMC call from OP-TEE. - Register optee SMC ID for EMI MPU. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Signed-off-by: Ming Huang <ming.huang@mediatek.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Change-Id: I924ea85d29d4113e92d8f3d411c0fb77daa0c205
2023-03-21feat(mediatek): add SMC handler for EMI MPUBo-Chen Chen
EMI MPU will handle the SMC call from optee, so we need to add this patch to support it. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Change-Id: I22e128c4246814cbd5855f51a26e4e11ccfe3a6b
2023-03-21feat(mediatek): add SiP service for OP-TEEBo-Chen Chen
Add SiP service for the SMC call from the secure world. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Change-Id: I7a5cfaac5c46ea65be793c3d291e4332cc0b2e54
2023-02-20build: always prefix section names with `.`Chris Kay
Some of our specialized sections are not prefixed with the conventional period. The compiler uses input section names to derive certain other section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be difficult to select in linker scripts when there is a lack of a delimiter. This change introduces the period prefix to all specialized section names. BREAKING-CHANGE: All input and output linker section names have been prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`. Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10build: permit multiple linker scriptsChris Kay
This change allows platforms to provide more than one linker script to any image utilizing the `MAKE_BL` build system macro. This is already done by some MediaTek platforms via the `EXTRA_LINKERFILE` build system variable, which has now been removed. In its place, additional linker scripts may be added to the `<IMAGE>_LINKER_SCRIPT_SOURCES` variable. BREAKING-CHANGE: The `EXTRA_LINKERFILE` build system variable has been replaced with the `<IMAGE>_LINKER_SCRIPT_SOURCES` variable. See the commit message for more information. Change-Id: I3f0b69200d6a4841fd158cd09344ce9e67047271 Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-01-11refactor(mediatek): add new LPM API for further extensionLiju-Clr Chen
Add new LPM API `mt_lp_rm_find_constraint` and `mt_lp_rm_run_constraint` for further extension. Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com> Change-Id: I8298811e03227285a7d086166edf9e87471f74b4
2023-01-11refactor(mediatek): change the parameters of LPM APILiju-Clr Chen
Change the parameters of the LPM API for further extension. Change-Id: Id8897c256c2118d00c6b9f3e7424ebc6100f02eb Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11refactor(mediatek): change LPM header file path for further extensionLiju-Clr Chen
Move `mt_lp_rm.h` to `plat/mediatek/include/lpm` for further extension. Change-Id: If377ce6791ce80f82643b0f2466eb0f1aa5aa40b Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11feat(mt8188): keep infra and peri on when system suspendShaocheng Wang
In order to wake up system from USB devices, keep infra and peri on when system suspend. Change-Id: I0a0eb2e72709b0cc1bf11b36241a50cb5d85d9b8 Signed-off-by: Shaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com>
2023-01-11feat(mt8188): enable SPM and LPMJames Liao
Enable SPM and LPM features for MT8188. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: Ib3e2b305e9e3cf5a67e6e787ff942831b5ff28cd
2023-01-11feat(mt8188): add SPM feature supportJames Liao
Add SPM low power functions, such as system suspend. Change-Id: I6d1ad847a81ba9c347ab6fb8a8cb8c69004b7add Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
2023-01-11feat(mt8188): add MT8188 SPM supportJames Liao
Add SPM basic functions including SPM init. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I5d4860685c15f3b8d555e697837862287f0c303e
2023-01-11feat(mediatek): add SPM's SSPM notifierJames Liao
The notifier is used to notify SSPM to sleep when system suspend or notify SSPM to wakeup when system resume. Change-Id: I027ca356a84ea1e58be54a8a5eb302b3b96c2e22 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
2023-01-11feat(mt8188): add the register definitions accessed by SPMJames Liao
SPM needs to access some modules' registers to decide its sleep behavior. This patch add these register definitions to platform_def.h. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I3bebe74e367d5f6a7b59563036e18a83a3ef31e9
2023-01-11feat(mediatek): add new features of LPMJames Liao
Add new functions and intefaces of LPM to support more interactions between LPM providers and users. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I8ebbda0c0ef5be3a7a388a38c09424ebf785996f
2023-01-10Merge changes from topic "bk/warnings" into integrationManish Pandey
* changes: docs: describe the new warning levels build: add -Wunused-const-variable=2 to W=2 build: include -Wextra in generic builds docs(porting-guide): update a reference fix(st-usb): replace redundant checks with asserts fix(brcm): add braces around bodies of conditionals fix(renesas): align incompatible function pointers fix(zynqmp): remove redundant api_version check fix: remove old-style declarations fix: unify fallthrough annotations
2023-01-06feat(mt8188): update INFRA IOMMU enable flowChengci.Xu
IOMMU kernel driver has changed the function parameters, so update IOMMU TF-A driver to be consistent with it. Change-Id: I2adda69bdbdc31833781fac5e6c1f4b10da161be Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
2022-12-01fix: unify fallthrough annotationsBoyan Karatotev
Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces many warnings about fallthrough comments either missing or being wrong. Unify the comments so we comply with -Wextra. Note that Coverity recommends against using the __attribute__ directive. Also, zlib does not build with a higher value of -Wimplicit-fallthrough. Finally, compilers strip comments before expanding macros. As such, checkpatch's fallthrough annotation (or higher levels of the flag) isn't really possible. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I060cf4f8dc04c02cbb45cf4ceb69569a8369ccee
2022-11-14fix(mt8188): add mmap entry for CPU idle SRAMLiju-Clr Chen
CPU PM driver accesses CPU idle SRAM during the system suspend process. The region of CPU idle SRAM needs to be added as mmap entry. Otherwise, the execption would occur. BUG=b:244215539 TEST=Test of suspend resume passes. Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com> Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003
2022-11-14fix(mt8188): refine gic init flow after system resumeJames Liao
Call gicv3_distif_init() instead of mt_gic_init() in armv8_2_mcusys_pwr_on_common(). This is to prevent gicv3_rdistif_init() and gicv3_cpuif_enable() from being called twice in the power-on flow. gicv3_rdistif_init() and gicv3_cpuif_enable() are called in later armv8_2_cpu_pwr_on_common(). BUG=b:244215539 TEST=Suspend Resume Test pass Change-Id: Id752c1ccbb9eab277ed6278c2dd90a051a894146 Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2022-11-14fix(mt8186): fix the DRAM voltage after the system resumesAllen-KH Cheng
The DRAM power supply must sustain at 0.8V after the system resumes. Otherwise, unexpected errors would occur. Therefore, we update the DRAM voltage to 0.8v in PMIC voltage wrap table. BUG=b:253537849 TEST=Suspend Resume Test Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com> Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3
2022-11-14feat(mt8188): add audio supportTrevor Wu
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal mode switch. - Add audio common code and chip specific code. - Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h. - Enable for MT8188. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62