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path: root/drivers/renesas/rcar
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2019-06-22rcar_gen3: drivers: pfc: Move PFC drivers out of stagingMarek Vasut
Now that PFC drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e
2019-06-17rcar_gen3: drivers: qos: Move QoS drivers out of stagingMarek Vasut
Now that QoS drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
2019-06-14rcar_gen3: console: Convert to multi-console APIMarek Vasut
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I18556973937d150b60453f9150d54ee612571e35
2019-04-11rcar_gen3: drivers: Change to restore timer counter value at resumeToshiyuki Ogasahara
Changed to save and restore cntpct_el0 using memory mapped register for generic timer when System Suspend and Resume. Reported by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I40fd9f5434c4d52b320cd1d20322b9b8e4e67155
2019-04-11rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh modeYoshifumi Hosoya
Very rarely, LPDDR4 power consumption may not decrease In self-refresh mode. This patch fixes the DBSC4 self-refresh mode sequence. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Kenji Miyazawa <kenji.miyazawa.xt@renesas.com> Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Change-Id: I838fa0892b1caf1ecd3f04538b3427e7d971ef59
2019-04-11rcar_gen3: drivers: board: Add new board revision for H3ULCBYusuke Goda
Board Revision[2:0] 3'b000 Rev1.0 OB 3'b001 Rev1.0 CE 3'b010 Rev2.0 [New] Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Change-Id: I0f109cddc95eca78aea34c7149e70f14e2f1620b
2019-04-02rcar_gen3: plat: Add R-Car V3M supportValentine Barshak
Add R-Car V3M support. This is based on the original V3M support patch for Yocto v2.23.1 by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> --- Marek: Update on top of mainline ATF/master
2019-04-02rcar_gen3: drivers: swdt: Add D3 supportMarek Vasut
Add WTCNT register configuration for the D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02rcar_gen3: drivers: scif: Add D3 supportMarek Vasut
Add SCIF configuration specifics for the D3 SoC, that is detection of the D3 SoC and SCBRR configuration. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02rcar_gen3: drivers: pwrc: Add D3 supportMarek Vasut
The D3 SoC has one CPU core, just return 1 as a CPU number. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02rcar_gen3: drivers: rom: Mark NEW table as D3 compatibleMarek Vasut
Add comment into the ROM driver that the new table is also D3 compatible. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02rcar_gen3: plat: Add initial D3 supportMarek Vasut
Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code will be added separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-03-04rcar_gen3: Add M3-W 3.0 supportMarek Vasut
Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-29rcar_gen3: drivers: cpld: fix power-off on resetSergii Boryshchenko
Method cpld_reset_cpu of bl31 is called from the Linux kernel and uses GPIO6, GPIO2 pins as SPI bus lines to control the CPLD device. But in the kernel GPIO6_8 pin are initialized to work in interrupt mode instead of the input/output mode. This leads to the fact that the SPI bus becomes non-functional. In this patch we switch the GPIO6_8 pin back to the input-output mode. Signed-off-by: Sergii Boryshchenko <sergii.boryshchenko@globallogic.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-29rcar_gen3: plat: Add missing cpu_on_check() implementationMarek Vasut
The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing function into the PWRC code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: pwrc: Switch to common delay implementationMarek Vasut
Replace the ad-hoc implementation of delay in PWRC driver with common R-Car delay code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: delay: Rewrite from assembler to CMarek Vasut
Rewrite the delay code from assembler to C. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: scif: Use TEND flag for transmission end detectionMarek Vasut
Use the SCIF SCFSR:TEND bit to check that all data were transmitted by the SCIF and that there are no more valid data to transmit in the FIFO. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into headerMarek Vasut
Move the rcar_cpld_reset_cpu() function into header file and zap the externs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: swdt: Access SCR in EL3Marek Vasut
The code runs in EL3, use EL3 accessors to manipulate the interrupt bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: auth-mod: Access SCTLR in EL3Marek Vasut
The code runs in EL3, use EL3 accessors to manipulate the cache bits. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Clean up rcar_pwrc_code_copy_to_system_ram()Marek Vasut
Call the function only from architecture setup and at the end of suspend cycle instead of calling it all over the place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08Standardise header guards across codebaseAntonio Nino Diaz
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-06rcar_gen3: E3 target: fix compilation issuesldts
Target builds but has not been tested. Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
2018-10-17rcar_gen3: drivers: watchdogJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: serial controller interfaceJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: spi multio bus controllerJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: rom apiJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: power controllerJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: consoleJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: io [emmc/mem]Jorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: i2c dvfsJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: emmcJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: dmaJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: micro delay generatorJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: cpldJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: board identificationJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: avs [adaptive voltage scaling]Jorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar_gen3: drivers: authenticationJorge Ramirez-Ortiz
Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17rcar-gen3: initial commit for the rcar-gen3 boardsJorge Ramirez-Ortiz
Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 *linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- * cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com>