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Trusted Firmware for A profile Arm CPUs
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Age
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Author
2014-08-15
Unmask SError interrupt and clear SCR_EL3.EA bit
Achin Gupta
2014-08-04
Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
danh-arm
2014-08-01
Call platform_is_primary_cpu() only from reset handler
Juan Castillo
2014-07-31
Optimize EL3 register state stored in cpu_context structure
Soby Mathew
2014-07-28
Merge pull request #172 from soby-mathew/sm/asm_assert
danh-arm
2014-07-28
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
Soby Mathew
2014-07-28
Rework the crash reporting in BL3-1 to use less stack
Soby Mathew
2014-07-28
Simplify management of SCTLR_EL3 and SCTLR_EL1
Achin Gupta
2014-07-19
Remove coherent stack usage from the warm boot path
Achin Gupta
2014-07-19
Remove coherent stack usage from the cold boot path
Achin Gupta
2014-07-10
Allow FP register context to be optional at build time
Juan Castillo
2014-06-27
Merge pull request #151 from vikramkanigiri/vk/t133-code-readability
Andrew Thoelke
2014-06-24
Simplify entry point information generation code on FVP
Vikram Kanigiri
2014-06-23
Initialise CPU contexts from entry_point_info
Andrew Thoelke
2014-06-17
Remove early_exceptions from BL3-1
Andrew Thoelke
2014-06-16
Per-cpu data cache restructuring
Andrew Thoelke
2014-06-16
Merge pull request #133 from athoelke/at/crash-reporting-opt
danh-arm
2014-06-11
Make the BL3-1 crash reporting optional
Andrew Thoelke
2014-06-05
Include 'platform_def.h' header file in 'crash_reporting.S'
Sandrine Bailleux
2014-05-29
Fix compilation issue for IMF_READ_INTERRUPT_ID build flag
Soby Mathew
2014-05-29
Pass 'cookie' parameter to interrupt handler in BL3-1
Soby Mathew
2014-05-27
Further renames of platform porting functions
Dan Handley
2014-05-23
Split platform.h into separate headers
Dan Handley
2014-05-22
Introduce interrupt handling framework in BL3-1
Achin Gupta
2014-05-22
Add support for BL3-1 as a reset vector
Vikram Kanigiri
2014-05-22
Populate BL31 input parameters as per new spec
Vikram Kanigiri
2014-05-22
Rework handover interface between BL stages
Vikram Kanigiri
2014-05-19
Merge pull request #78 from jeenuv:tf-issues-148
Andrew Thoelke
2014-05-16
Add build configuration for timer save/restore
Jeenu Viswambharan
2014-05-16
Rework BL3-1 unhandled exception handling and reporting
Soby Mathew
2014-05-08
Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu...
danh-arm
2014-05-08
Merge pull request #62 from athoelke/set-little-endian-v2
danh-arm
2014-05-08
Preserve x19-x29 across world switch for exception handling
Soby Mathew
2014-05-07
Access system registers directly in assembler
Andrew Thoelke
2014-05-07
Correct usage of data and instruction barriers
Andrew Thoelke
2014-05-07
Set processor endianness immediately after RESET
Andrew Thoelke
2014-05-06
Reduce deep nesting of header files
Dan Handley
2014-05-06
Make use of user/system includes more consistent
Dan Handley
2014-04-15
Allocate single stacks for BL1 and BL2
Andrew Thoelke
2014-04-15
Merge pull request #36 from athoelke/at/gc-sections-80
danh-arm
2014-04-08
Define frequency of system counter in platform code
Sandrine Bailleux
2014-04-08
Revert "Move architecture timer setup to platform-specific code"
Sandrine Bailleux
2014-03-26
Place assembler functions in separate sections
Andrew Thoelke
2014-03-26
Move per cpu exception stack in BL31 to tzfw_normal_stacks
Vikram Kanigiri
2014-03-21
Remove partially qualified asm helper functions
Vikram Kanigiri
2014-03-10
Move architecture timer setup to platform-specific code
Jeenu Viswambharan
2014-02-20
Add support for BL3-2 in BL3-1
Achin Gupta
2014-02-20
Rework BL2 to BL3-1 hand over interface
Achin Gupta
2014-02-20
Add exception vector guards
Jeenu Viswambharan
2014-02-17
Add support for handling runtime service requests
Jeenu Viswambharan
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