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Diffstat (limited to 'plat/st/stm32mp1/stm32mp1.ld.S')
-rw-r--r--plat/st/stm32mp1/stm32mp1.ld.S22
1 files changed, 7 insertions, 15 deletions
diff --git a/plat/st/stm32mp1/stm32mp1.ld.S b/plat/st/stm32mp1/stm32mp1.ld.S
index b347baddf7..1be82193b7 100644
--- a/plat/st/stm32mp1/stm32mp1.ld.S
+++ b/plat/st/stm32mp1/stm32mp1.ld.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,7 +16,7 @@ OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
ENTRY(__BL2_IMAGE_START__)
MEMORY {
- HEADER (rw) : ORIGIN = 0x00000000, LENGTH = 0x3000
+ HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
}
@@ -43,7 +43,7 @@ SECTIONS
* The strongest and only alignment contraint is MMU 4K page.
* Indeed as images below will be removed, 4K pages will be re-used.
*/
- . = ( STM32MP_DTB_BASE - STM32MP_BINARY_BASE );
+ . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
__DTB_IMAGE_START__ = .;
*(.dtb_image*)
__DTB_IMAGE_END__ = .;
@@ -53,23 +53,15 @@ SECTIONS
* The strongest and only alignment contraint is MMU 4K page.
* Indeed as images below will be removed, 4K pages will be re-used.
*/
+#if SEPARATE_CODE_AND_RODATA
+ . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
+#else
. = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
+#endif
__BL2_IMAGE_START__ = .;
*(.bl2_image*)
__BL2_IMAGE_END__ = .;
-#ifndef AARCH32_SP_OPTEE
- /*
- * bl32 will be settled by bl2.
- * The strongest and only alignment constraint is 8 words to simplify
- * memraise8 assembly code.
- */
- . = ( STM32MP_BL32_BASE - STM32MP_BINARY_BASE );
- __BL32_IMAGE_START__ = .;
- *(.bl32_image*)
- __BL32_IMAGE_END__ = .;
-#endif
-
__DATA_END__ = .;
} >RAM