diff options
Diffstat (limited to 'plat/imx/imx8qm/imx8qm_bl31_setup.c')
-rw-r--r-- | plat/imx/imx8qm/imx8qm_bl31_setup.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c index 4ca6a5db4b..bd7896a997 100644 --- a/plat/imx/imx8qm/imx8qm_bl31_setup.c +++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c @@ -1,10 +1,12 @@ /* - * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <assert.h> +#include <inttypes.h> +#include <stdint.h> #include <stdbool.h> #include <platform_def.h> @@ -17,7 +19,7 @@ #include <drivers/console.h> #include <lib/el3_runtime/context_mgmt.h> #include <lib/mmio.h> -#include <lib/xlat_tables/xlat_tables.h> +#include <lib/xlat_tables/xlat_tables_v2.h> #include <plat/common/platform.h> #include <imx8qm_pads.h> @@ -60,7 +62,7 @@ static entry_point_info_t bl33_image_ep_info; #error "Provide proper UART number in IMX_DEBUG_UART" #endif -const static int imx8qm_cci_map[] = { +static const int imx8qm_cci_map[] = { CLUSTER0_CCI_SLVAE_IFACE, CLUSTER1_CCI_SLVAE_IFACE }; @@ -261,14 +263,14 @@ void mx8_partition_resources(void) err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end); if (err) ERROR("Memreg get info failed, %u\n", mr); - NOTICE("Memreg %u 0x%llx -- 0x%llx\n", mr, start, end); + NOTICE("Memreg %u 0x%" PRIx64 " -- 0x%" PRIx64 "\n", mr, start, end); if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { mr_record = mr; /* Record the mr for ATF running */ } else { err = sc_rm_assign_memreg(ipc_handle, os_part, mr); if (err) - ERROR("Memreg assign failed, 0x%llx -- 0x%llx, \ - err %d\n", start, end, err); + ERROR("Memreg assign failed, 0x%" PRIx64 " -- 0x%" PRIx64 ", \ + err %d\n", start, end, err); } } } @@ -280,23 +282,23 @@ void mx8_partition_resources(void) if ((BL31_LIMIT - 1) < end) { err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end); if (err) - ERROR("sc_rm_memreg_alloc failed, 0x%llx -- 0x%llx\n", - (sc_faddr_t)BL31_LIMIT, end); + ERROR("sc_rm_memreg_alloc failed, 0x%" PRIx64 " -- 0x%" PRIx64 "\n", + (sc_faddr_t)BL31_LIMIT, end); err = sc_rm_assign_memreg(ipc_handle, os_part, mr); if (err) - ERROR("Memreg assign failed, 0x%llx -- 0x%llx\n", - (sc_faddr_t)BL31_LIMIT, end); + ERROR("Memreg assign failed, 0x%" PRIx64 " -- 0x%" PRIx64 "\n", + (sc_faddr_t)BL31_LIMIT, end); } if (start < (BL31_BASE - 1)) { err = sc_rm_memreg_alloc(ipc_handle, &mr, start, BL31_BASE - 1); if (err) - ERROR("sc_rm_memreg_alloc failed, 0x%llx -- 0x%llx\n", - start, (sc_faddr_t)BL31_BASE - 1); + ERROR("sc_rm_memreg_alloc failed, 0x%" PRIx64 " -- 0x%" PRIx64 "\n", + start, (sc_faddr_t)BL31_BASE - 1); err = sc_rm_assign_memreg(ipc_handle, os_part, mr); if (err) - ERROR("Memreg assign failed, 0x%llx -- 0x%llx\n", - start, (sc_faddr_t)BL31_BASE - 1); + ERROR("Memreg assign failed, 0x%" PRIx64 " -- 0x%" PRIx64 "\n", + start, (sc_faddr_t)BL31_BASE - 1); } } |