diff options
Diffstat (limited to 'lib/cpus/aarch64/cortex_matterhorn.S')
-rw-r--r-- | lib/cpus/aarch64/cortex_matterhorn.S | 77 |
1 files changed, 0 insertions, 77 deletions
diff --git a/lib/cpus/aarch64/cortex_matterhorn.S b/lib/cpus/aarch64/cortex_matterhorn.S deleted file mode 100644 index 4156f3cf89..0000000000 --- a/lib/cpus/aarch64/cortex_matterhorn.S +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (c) 2020, ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include <arch.h> -#include <asm_macros.S> -#include <common/bl_common.h> -#include <cortex_matterhorn.h> -#include <cpu_macros.S> -#include <plat_macros.S> - -/* Hardware handled coherency */ -#if HW_ASSISTED_COHERENCY == 0 -#error "Cortex Matterhorn must be compiled with HW_ASSISTED_COHERENCY enabled" -#endif - -/* 64-bit only core */ -#if CTX_INCLUDE_AARCH32_REGS == 1 -#error "Cortex Matterhorn supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" -#endif - - /* ---------------------------------------------------- - * HW will do the cache maintenance while powering down - * ---------------------------------------------------- - */ -func cortex_matterhorn_core_pwr_dwn - /* --------------------------------------------------- - * Enable CPU power down bit in power control register - * --------------------------------------------------- - */ - mrs x0, CORTEX_MATTERHORN_CPUPWRCTLR_EL1 - orr x0, x0, #CORTEX_MATTERHORN_CPUPWRCTLR_EL1_CORE_PWRDN_BIT - msr CORTEX_MATTERHORN_CPUPWRCTLR_EL1, x0 - isb - ret -endfunc cortex_matterhorn_core_pwr_dwn - - /* - * Errata printing function for Cortex Matterhorn. Must follow AAPCS. - */ -#if REPORT_ERRATA -func cortex_matterhorn_errata_report - ret -endfunc cortex_matterhorn_errata_report -#endif - -func cortex_matterhorn_reset_func - /* Disable speculative loads */ - msr SSBS, xzr - isb - ret -endfunc cortex_matterhorn_reset_func - - /* --------------------------------------------- - * This function provides Cortex-Matterhorn specific - * register information for crash reporting. - * It needs to return with x6 pointing to - * a list of register names in ascii and - * x8 - x15 having values of registers to be - * reported. - * --------------------------------------------- - */ -.section .rodata.cortex_matterhorn_regs, "aS" -cortex_matterhorn_regs: /* The ascii list of register names to be reported */ - .asciz "cpuectlr_el1", "" - -func cortex_matterhorn_cpu_reg_dump - adr x6, cortex_matterhorn_regs - mrs x8, CORTEX_MATTERHORN_CPUECTLR_EL1 - ret -endfunc cortex_matterhorn_cpu_reg_dump - -declare_cpu_ops cortex_matterhorn, CORTEX_MATTERHORN_MIDR, \ - cortex_matterhorn_reset_func, \ - cortex_matterhorn_core_pwr_dwn |