diff options
Diffstat (limited to 'bl31/aarch64/runtime_exceptions.S')
-rw-r--r-- | bl31/aarch64/runtime_exceptions.S | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S index 4f53b8e70d..aa9d0079be 100644 --- a/bl31/aarch64/runtime_exceptions.S +++ b/bl31/aarch64/runtime_exceptions.S @@ -120,7 +120,17 @@ * --------------------------------------------------------------------- */ .macro handle_interrupt_exception label + bl save_gp_registers + + /* Save ARMv8.3-PAuth registers and load firmware key */ +#if CTX_INCLUDE_PAUTH_REGS + bl pauth_context_save +#endif +#if ENABLE_PAUTH + bl pauth_load_bl_apiakey +#endif + /* Save the EL3 system registers needed to return from this exception */ mrs x0, spsr_el3 mrs x1, elr_el3 @@ -320,14 +330,25 @@ smc_handler32: tbnz x0, #FUNCID_CC_SHIFT, smc_prohibited smc_handler64: + /* NOTE: The code below must preserve x0-x4 */ + + /* Save general purpose registers */ + bl save_gp_registers + + /* Save ARMv8.3-PAuth registers and load firmware key */ +#if CTX_INCLUDE_PAUTH_REGS + bl pauth_context_save +#endif +#if ENABLE_PAUTH + bl pauth_load_bl_apiakey +#endif + /* * Populate the parameters for the SMC handler. * We already have x0-x4 in place. x5 will point to a cookie (not used * now). x6 will point to the context structure (SP_EL3) and x7 will * contain flags we need to pass to the handler. */ - bl save_gp_registers - mov x5, xzr mov x6, sp |