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-rw-r--r--docs/getting_started/build-options.rst3
-rw-r--r--drivers/arm/gic/v3/gicv3.mk5
-rw-r--r--drivers/arm/gic/v3/gicv3_main.c19
-rw-r--r--include/drivers/arm/gic_common.h16
-rw-r--r--include/drivers/arm/gicv3.h6
5 files changed, 33 insertions, 16 deletions
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index 38845ff0b6..778b49c207 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -693,6 +693,9 @@ makefile:
functions. This is required for FVP platform which need to simulate GIC save
and restore during SYSTEM_SUSPEND without powering down GIC. Default is 0.
+- ``GIC_ENABLE_V4_EXTN`` : Enables GICv4 related changes in GICv3 driver.
+ This option defaults to 0.
+
- ``GIC_EXT_INTID``: When set to ``1``, GICv3 driver will support extended
PPI (1056-1119) and SPI (4096-5119) range. This option defaults to 0.
diff --git a/drivers/arm/gic/v3/gicv3.mk b/drivers/arm/gic/v3/gicv3.mk
index 73339d9915..0f401035dd 100644
--- a/drivers/arm/gic/v3/gicv3.mk
+++ b/drivers/arm/gic/v3/gicv3.mk
@@ -8,6 +8,7 @@
GICV3_IMPL ?= GIC500
GICV3_IMPL_GIC600_MULTICHIP ?= 0
GICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0
+GIC_ENABLE_V4_EXTN ?= 0
GIC_EXT_INTID ?= 0
GICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \
@@ -33,6 +34,10 @@ else
$(error "Incorrect GICV3_IMPL value ${GICV3_IMPL}")
endif
+# Set GICv4 extension
+$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN))
+$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
+
# Set support for extended PPI and SPI range
$(eval $(call assert_boolean,GIC_EXT_INTID))
$(eval $(call add_define,GIC_EXT_INTID))
diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c
index aefaa35953..8c27efdae5 100644
--- a/drivers/arm/gic/v3/gicv3_main.c
+++ b/drivers/arm/gic/v3/gicv3_main.c
@@ -116,12 +116,20 @@ void __init gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)
(ID_AA64PFR0_GIC_MASK << ID_AA64PFR0_GIC_SHIFT)) != 0U);
#endif /* !__aarch64__ */
- /* The GIC version should be 3 */
gic_version = gicd_read_pidr2(plat_driver_data->gicd_base);
gic_version >>= PIDR2_ARCH_REV_SHIFT;
gic_version &= PIDR2_ARCH_REV_MASK;
- assert(gic_version == ARCH_REV_GICV3);
+ /* Check GIC version */
+#if GIC_ENABLE_V4_EXTN
+ assert(gic_version == ARCH_REV_GICV4);
+
+ /* GICv4 supports Direct Virtual LPI injection */
+ assert((gicd_read_typer(plat_driver_data->gicd_base)
+ & TYPER_DVIS) != 0);
+#else
+ assert(gic_version == ARCH_REV_GICV3);
+#endif
/*
* Find out whether the GIC supports the GICv2 compatibility mode.
* The ARE_S bit resets to 0 if supported
@@ -165,10 +173,9 @@ void __init gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)
flush_dcache_range((uintptr_t)gicv3_driver_data,
sizeof(*gicv3_driver_data));
#endif
-
- INFO("GICv3 with%s legacy support detected."
- " ARM GICv3 driver initialized in EL3\n",
- (gicv2_compat == 0U) ? "" : "out");
+ INFO("GICv%u with%s legacy support detected.\n", gic_version,
+ (gicv2_compat == 0U) ? "" : "out");
+ INFO("ARM GICv%u driver initialized in EL3\n", gic_version);
}
/*******************************************************************************
diff --git a/include/drivers/arm/gic_common.h b/include/drivers/arm/gic_common.h
index 3ac1b43fff..dc23721bbb 100644
--- a/include/drivers/arm/gic_common.h
+++ b/include/drivers/arm/gic_common.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -40,7 +40,7 @@
#define GIC_HIGHEST_NS_PRIORITY U(0x80)
/*******************************************************************************
- * GIC Distributor interface register offsets that are common to GICv3 & GICv2
+ * Common GIC Distributor interface register offsets
******************************************************************************/
#define GICD_CTLR U(0x0)
#define GICD_TYPER U(0x4)
@@ -61,19 +61,17 @@
#define CTLR_ENABLE_G0_MASK U(0x1)
#define CTLR_ENABLE_G0_BIT BIT_32(CTLR_ENABLE_G0_SHIFT)
-
/*******************************************************************************
- * GIC Distributor interface register constants that are common to GICv3 & GICv2
+ * Common GIC Distributor interface register constants
******************************************************************************/
#define PIDR2_ARCH_REV_SHIFT 4
#define PIDR2_ARCH_REV_MASK U(0xf)
-/* GICv3 revision as reported by the PIDR2 register */
-#define ARCH_REV_GICV3 U(0x3)
-/* GICv2 revision as reported by the PIDR2 register */
-#define ARCH_REV_GICV2 U(0x2)
-/* GICv1 revision as reported by the PIDR2 register */
+/* GIC revision as reported by PIDR2.ArchRev register field */
#define ARCH_REV_GICV1 U(0x1)
+#define ARCH_REV_GICV2 U(0x2)
+#define ARCH_REV_GICV3 U(0x3)
+#define ARCH_REV_GICV4 U(0x4)
#define IGROUPR_SHIFT 5
#define ISENABLER_SHIFT 5
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index c29896b4b5..03596b96ec 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -151,9 +151,13 @@
#define TYPER_ESPI_RANGE U(TYPER_ESPI_MASK << TYPER_ESPI_SHIFT)
/*******************************************************************************
- * GICv3 and 3.1 Redistributor interface registers & constants
+ * Common GIC Redistributor interface registers & constants
******************************************************************************/
+#if GIC_ENABLE_V4_EXTN
+#define GICR_PCPUBASE_SHIFT 0x12
+#else
#define GICR_PCPUBASE_SHIFT 0x11
+#endif
#define GICR_SGIBASE_OFFSET U(65536) /* 64 KB */
#define GICR_CTLR U(0x0)
#define GICR_IIDR U(0x04)