diff options
author | Yann Gautier <yann.gautier@foss.st.com> | 2021-07-13 14:44:09 +0200 |
---|---|---|
committer | Yann Gautier <yann.gautier@foss.st.com> | 2021-09-06 13:21:54 +0200 |
commit | 84090d2ca4aeace94911442ebe4cc7de3ab794e6 (patch) | |
tree | 79f213544a4373b90d04a6efee49c17ceea3bb15 /plat | |
parent | b84a850864c05fef587fcbb301f955428966de64 (diff) | |
download | trusted-firmware-a-84090d2ca4aeace94911442ebe4cc7de3ab794e6.tar.gz |
refactor(plat/st): updates for OP-TEE
Protect BL32 (SP_min) with MMU if OP-TEE is not used.
Validate OP-TEE header with optee_header_is_valid().
Use default values in bl2_mem_params_descs[]. They will be overwritten
in bl2_plat_handle_post_image_load() if OP-TEE is used.
Change-Id: I8614f3a17caa827561614d0f25f30ee90c4ec3fe
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Diffstat (limited to 'plat')
-rw-r--r-- | plat/st/stm32mp1/bl2_plat_setup.c | 64 | ||||
-rw-r--r-- | plat/st/stm32mp1/plat_bl2_mem_params_desc.c | 13 |
2 files changed, 39 insertions, 38 deletions
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index b4c42fc06c..ac2a1e282f 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -177,6 +177,11 @@ void bl2_el3_plat_arch_setup(void) mmap_add_region(STM32MP_OPTEE_BASE, STM32MP_OPTEE_BASE, STM32MP_OPTEE_SIZE, MT_MEMORY | MT_RW | MT_SECURE); +#else + /* Prevent corruption of preloaded BL32 */ + mmap_add_region(BL32_BASE, BL32_BASE, + BL32_LIMIT - BL32_BASE, + MT_RO_DATA | MT_SECURE); #endif /* Prevent corruption of preloaded Device Tree */ mmap_add_region(DTB_BASE, DTB_BASE, @@ -336,37 +341,36 @@ int bl2_plat_handle_post_image_load(unsigned int image_id) switch (image_id) { case BL32_IMAGE_ID: - bl_mem_params->ep_info.pc = - bl_mem_params->image_info.image_base; - - pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); - assert(pager_mem_params != NULL); - pager_mem_params->image_info.image_base = STM32MP_OPTEE_BASE; - pager_mem_params->image_info.image_max_size = - STM32MP_OPTEE_SIZE; - - paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); - assert(paged_mem_params != NULL); - paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + - stm32mp_get_ddr_ns_size(); - paged_mem_params->image_info.image_max_size = - STM32MP_DDR_S_SIZE; - - err = parse_optee_header(&bl_mem_params->ep_info, - &pager_mem_params->image_info, - &paged_mem_params->image_info); - if (err) { - ERROR("OPTEE header parse error.\n"); - panic(); + if (optee_header_is_valid(bl_mem_params->image_info.image_base)) { + /* BL32 is OP-TEE header */ + bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base; + pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); + paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); + assert((pager_mem_params != NULL) && (paged_mem_params != NULL)); + + /* Set OP-TEE extra image load areas at run-time */ + pager_mem_params->image_info.image_base = STM32MP_OPTEE_BASE; + pager_mem_params->image_info.image_max_size = STM32MP_OPTEE_SIZE; + + paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + + dt_get_ddr_size() - + STM32MP_DDR_S_SIZE - + STM32MP_DDR_SHMEM_SIZE; + paged_mem_params->image_info.image_max_size = STM32MP_DDR_S_SIZE; + + err = parse_optee_header(&bl_mem_params->ep_info, + &pager_mem_params->image_info, + &paged_mem_params->image_info); + if (err) { + ERROR("OPTEE header parse error.\n"); + panic(); + } + + /* Set optee boot info from parsed header data */ + bl_mem_params->ep_info.args.arg0 = paged_mem_params->image_info.image_base; + bl_mem_params->ep_info.args.arg1 = 0; /* Unused */ + bl_mem_params->ep_info.args.arg2 = 0; /* No DT supported */ } - - /* Set optee boot info from parsed header data */ - bl_mem_params->ep_info.pc = - pager_mem_params->image_info.image_base; - bl_mem_params->ep_info.args.arg0 = - paged_mem_params->image_info.image_base; - bl_mem_params->ep_info.args.arg1 = 0; /* Unused */ - bl_mem_params->ep_info.args.arg2 = 0; /* No DT supported */ break; case BL33_IMAGE_ID: diff --git a/plat/st/stm32mp1/plat_bl2_mem_params_desc.c b/plat/st/stm32mp1/plat_bl2_mem_params_desc.c index 984c6ba08b..293ddfd93a 100644 --- a/plat/st/stm32mp1/plat_bl2_mem_params_desc.c +++ b/plat/st/stm32mp1/plat_bl2_mem_params_desc.c @@ -27,9 +27,9 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { VERSION_2, entry_point_info_t, SECURE | EXECUTABLE | EP_FIRST_EXE), -#if !defined(AARCH32_SP_OPTEE) + /* Updated at runtime if OP-TEE is loaded */ .ep_info.pc = STM32MP_BL32_BASE, -#endif + .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS), @@ -37,14 +37,11 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP), -#if defined(AARCH32_SP_OPTEE) - /* optee header is loaded in SYSRAM above BL2 */ - .image_info.image_base = STM32MP_OPTEE_BASE, - .image_info.image_max_size = STM32MP_OPTEE_SIZE, -#else + + /* Updated at runtime if OP-TEE is loaded */ .image_info.image_base = STM32MP_BL32_BASE, .image_info.image_max_size = STM32MP_BL32_SIZE, -#endif + .next_handoff_image_id = BL33_IMAGE_ID, }, |