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authorVikram Kanigiri <vikram.kanigiri@arm.com>2014-07-15 16:46:43 +0100
committerVikram Kanigiri <vikram.kanigiri@arm.com>2014-08-01 09:46:52 +0100
commit50e27dadbcc4b442f1c5ceb343c6d55783afed54 (patch)
tree7fd1d7a75eff50ed56e906aadaf68833a22b40cf /plat
parentdd2bdee61682df0ec65dfc43371c126a86a30c30 (diff)
downloadtrusted-firmware-a-50e27dadbcc4b442f1c5ceb343c6d55783afed54.tar.gz
Rework the TSPD setup code
There is no mechanism which allows the TSPD to specify what SPSR to use when entering BL3-2 instead of BL3-3. This patch divides the responsibility between tspd_setup() and tspd_init() for initializing the TSPD and TSP to support the alternate BL3-2 initialization flow where BL3-1 handsover control to BL3-2 instead of BL3-3. SPSR generated by TSPD for TSP is preserved due the new division of labour which fixes #174. This patch also moves the cpu_context initialization code from tspd_setup() to tspd_init() immediately before entering the TSP. Instead tspd_setup() updates the BL3-2 entrypoint info structure with the state required for initializing the TSP later. Fixes ARM-software/TF-issues#174 Change-Id: Ida0a8a48d466c71d5b07b8c7f2af169b73f96940
Diffstat (limited to 'plat')
-rw-r--r--plat/fvp/bl31_fvp_setup.c50
1 files changed, 28 insertions, 22 deletions
diff --git a/plat/fvp/bl31_fvp_setup.c b/plat/fvp/bl31_fvp_setup.c
index 21fca70b44..0693a12af6 100644
--- a/plat/fvp/bl31_fvp_setup.c
+++ b/plat/fvp/bl31_fvp_setup.c
@@ -73,7 +73,8 @@ extern unsigned long __COHERENT_RAM_END__;
#if RESET_TO_BL31
-static entry_point_info_t next_image_ep_info;
+static entry_point_info_t bl32_image_ep_info;
+static entry_point_info_t bl33_image_ep_info;
#else
/*******************************************************************************
* Reference to structure which holds the arguments that have been passed to
@@ -91,28 +92,12 @@ static bl31_params_t *bl2_to_bl31_params;
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
{
#if RESET_TO_BL31
-
assert(sec_state_is_valid(type));
- SET_PARAM_HEAD(&next_image_ep_info,
- PARAM_EP,
- VERSION_1,
- 0);
- SET_SECURITY_STATE(next_image_ep_info.h.attr, type);
-
- if (type == NON_SECURE) {
- /*
- * Tell BL31 where the non-trusted software image
- * is located and the entry state information
- */
- next_image_ep_info.pc = plat_get_ns_image_entrypoint();
- next_image_ep_info.spsr = fvp_get_spsr_for_bl33_entry();
- } else {
- next_image_ep_info.pc = BL32_BASE;
- next_image_ep_info.spsr = fvp_get_spsr_for_bl32_entry();
- }
-
- return &next_image_ep_info;
+ if (type == NON_SECURE)
+ return &bl33_image_ep_info;
+ else
+ return &bl32_image_ep_info;
#else
entry_point_info_t *next_image_info;
@@ -155,7 +140,6 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
assert(from_bl2 == NULL);
assert(plat_params_from_bl2 == NULL);
-
/*
* Do initial security configuration to allow DRAM/device access. On
* Base FVP only DRAM security is programmable (via TrustZone), but
@@ -163,6 +147,28 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
* present.
*/
fvp_security_setup();
+
+ /* Populate entry point information for BL3-2 and BL3-3 */
+ SET_PARAM_HEAD(&bl32_image_ep_info,
+ PARAM_EP,
+ VERSION_1,
+ 0);
+ SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
+ bl32_image_ep_info.pc = BL32_BASE;
+ bl32_image_ep_info.spsr = fvp_get_spsr_for_bl32_entry();
+
+ SET_PARAM_HEAD(&bl33_image_ep_info,
+ PARAM_EP,
+ VERSION_1,
+ 0);
+ /*
+ * Tell BL31 where the non-trusted software image
+ * is located and the entry state information
+ */
+ bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
+ bl33_image_ep_info.spsr = fvp_get_spsr_for_bl33_entry();
+ SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
+
#else
/* Check params passed from BL2 should not be NULL,
* We are not checking plat_params_from_bl2 as NULL as we are not