aboutsummaryrefslogtreecommitdiff
path: root/plat/st/stm32mp1/stm32mp1_def.h
diff options
context:
space:
mode:
authorEtienne Carriere <etienne.carriere@st.com>2020-07-16 17:36:18 +0200
committerEtienne Carriere <etienne.carriere@st.com>2020-07-16 17:36:18 +0200
commitfdaaaeb4312532c60bf98b891ecf01e79ecd71f2 (patch)
tree987a11a63bbc58604c993e7e2fa93f9f41d69774 /plat/st/stm32mp1/stm32mp1_def.h
parent08826b6cf8a052fc68685a47f352dc95e95c6304 (diff)
downloadtrusted-firmware-a-fdaaaeb4312532c60bf98b891ecf01e79ecd71f2.tar.gz
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firmware. Requests execution use a fastcall SMC context using a SiP function ID. The setup allows the create SCMI channels by assigning a specific SiP SMC function ID for each channel/agent identifier defined. In this change, stm32mp1 exposes a single channel and hence expects single agent at a time. The input payload in copied in secure memory before the message in passed through the SCMI server drivers. BL32/sp_min is invoked for a single SCMI message processing and always returns with a synchronous response message passed back to the caller agent. This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was previously wrongly set 4 whereas only 1 SiP SMC function ID was to be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the 2 added SiP SMC function IDs for SCMI services. Change-Id: Icb428775856b9aec00538172aea4cf11e609b033 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Diffstat (limited to 'plat/st/stm32mp1/stm32mp1_def.h')
-rw-r--r--plat/st/stm32mp1/stm32mp1_def.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index bce599447a..ea18a3031d 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -62,6 +62,9 @@
STM32MP_SYSRAM_SIZE - \
STM32MP_NS_SYSRAM_SIZE)
+#define STM32MP_SCMI_NS_SHM_BASE STM32MP_NS_SYSRAM_BASE
+#define STM32MP_SCMI_NS_SHM_SIZE STM32MP_NS_SYSRAM_SIZE
+
#define STM32MP_SEC_SYSRAM_BASE STM32MP_SYSRAM_BASE
#define STM32MP_SEC_SYSRAM_SIZE (STM32MP_SYSRAM_SIZE - \
STM32MP_NS_SYSRAM_SIZE)