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authorYann Gautier <yann.gautier@st.com>2019-01-17 14:41:46 +0100
committerYann Gautier <yann.gautier@st.com>2019-01-18 15:45:08 +0100
commit59a1cdf16a49ef2bf1a505290cd8b689dfd3e5a1 (patch)
tree896b5a6f08d4c8074c23e7fae2c9af03ac9ff56f /plat/st/stm32mp1/stm32mp1_def.h
parent4156d4daa8c4f5de7e71d5c497cb466cf4cb83e6 (diff)
downloadtrusted-firmware-a-59a1cdf16a49ef2bf1a505290cd8b689dfd3e5a1.tar.gz
stm32mp1: update platform files
Move print_reset_reason function to bl2_plat_setup.c Put __unused attribute for unused bl2_el3_early_platform_setup args. Rename dt_dev_info to dt_uart_info. Put MMU configuration earlier. Remove unused macros. Use U() or ULL() macros where needed. Use device tree to configure GIC. Use GIC helper function. Change-Id: I34620c421cc6967a668bca318f7689fd74fa78a6 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Diffstat (limited to 'plat/st/stm32mp1/stm32mp1_def.h')
-rw-r--r--plat/st/stm32mp1/stm32mp1_def.h15
1 files changed, 2 insertions, 13 deletions
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index 15f0432b39..25a953da36 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -126,14 +126,6 @@ enum ddr_type {
#define STM32MP1_UART_BAUDRATE 115200
/*******************************************************************************
- * STM32MP1 GIC-400
- ******************************************************************************/
-#define STM32MP1_GICD_BASE U(0xA0021000)
-#define STM32MP1_GICC_BASE U(0xA0022000)
-#define STM32MP1_GICH_BASE U(0xA0024000)
-#define STM32MP1_GICV_BASE U(0xA0026000)
-
-/*******************************************************************************
* STM32MP1 TZC (TZ400)
******************************************************************************/
#define STM32MP1_TZC_BASE U(0x5C006000)
@@ -149,10 +141,7 @@ enum ddr_type {
#define STM32MP1_TZC_ETH_ID U(10)
#define STM32MP1_TZC_DAP_ID U(15)
-#define STM32MP1_MEMORY_NS 0
-#define STM32MP1_MEMORY_SECURE 1
-
-#define STM32MP1_FILTER_BIT_ALL 3
+#define STM32MP1_FILTER_BIT_ALL U(3)
/*******************************************************************************
* STM32MP1 SDMMC