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authorYann Gautier <yann.gautier@st.com>2019-04-19 09:41:01 +0200
committerYann Gautier <yann.gautier@st.com>2019-04-23 13:34:12 +0200
commit1989a19c2db9512c8a07867d219c45eb8d5995a4 (patch)
tree1330b552764dd8466a582d5ffc191b58721550bc /plat/st/stm32mp1/plat_bl2_mem_params_desc.c
parenteb4519ef653f9dc2fced5dc3e087db22485c3a7d (diff)
downloadtrusted-firmware-a-1989a19c2db9512c8a07867d219c45eb8d5995a4.tar.gz
stm32mp1: add OP-TEE support
Support booting OP-TEE as BL32 boot stage and secure runtime service. OP-TEE executes in internal RAM and uses a secure DDR area to store the pager pagestore. Memory mapping and TZC are configured accordingly prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where a header file describes the effective boot images. This change post processes header file content to get OP-TEE load addresses and set OP-TEE boot arguments. Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Diffstat (limited to 'plat/st/stm32mp1/plat_bl2_mem_params_desc.c')
-rw-r--r--plat/st/stm32mp1/plat_bl2_mem_params_desc.c41
1 files changed, 39 insertions, 2 deletions
diff --git a/plat/st/stm32mp1/plat_bl2_mem_params_desc.c b/plat/st/stm32mp1/plat_bl2_mem_params_desc.c
index 0da93e4fa0..1d407bb72b 100644
--- a/plat/st/stm32mp1/plat_bl2_mem_params_desc.c
+++ b/plat/st/stm32mp1/plat_bl2_mem_params_desc.c
@@ -27,7 +27,9 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
VERSION_2, entry_point_info_t,
SECURE | EXECUTABLE | EP_FIRST_EXE),
+#if !defined(AARCH32_SP_OPTEE)
.ep_info.pc = BL32_BASE,
+#endif
.ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
SPSR_E_LITTLE,
DISABLE_ALL_EXCEPTIONS),
@@ -35,13 +37,48 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
VERSION_2, image_info_t,
IMAGE_ATTRIB_PLAT_SETUP),
-
+#if defined(AARCH32_SP_OPTEE)
+ /* optee header is loaded in SYSRAM above BL2 */
+ .image_info.image_base = STM32MP_OPTEE_BASE,
+ .image_info.image_max_size = STM32MP_OPTEE_SIZE,
+#else
.image_info.image_base = BL32_BASE,
.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
-
+#endif
.next_handoff_image_id = BL33_IMAGE_ID,
},
+#if defined(AARCH32_SP_OPTEE)
+ /* Fill BL32 external 1 image related information */
+ {
+ .image_id = BL32_EXTRA1_IMAGE_ID,
+
+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
+ VERSION_2, entry_point_info_t,
+ SECURE | NON_EXECUTABLE),
+
+ SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
+ VERSION_2, image_info_t,
+ IMAGE_ATTRIB_SKIP_LOADING),
+
+ .next_handoff_image_id = INVALID_IMAGE_ID,
+ },
+ /* Fill BL32 external 2 image related information */
+ {
+ .image_id = BL32_EXTRA2_IMAGE_ID,
+
+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
+ VERSION_2, entry_point_info_t,
+ SECURE | NON_EXECUTABLE),
+
+ SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
+ VERSION_2, image_info_t,
+ IMAGE_ATTRIB_SKIP_LOADING),
+
+ .next_handoff_image_id = INVALID_IMAGE_ID,
+ },
+#endif /* AARCH32_SP_OPTEE */
+
/* Fill BL33 related information */
{
.image_id = BL33_IMAGE_ID,