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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-12-19 11:56:05 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-01-24 21:38:32 +0900 |
commit | 247fc0435191586b053f730302d28a419d3c6939 (patch) | |
tree | 94e60b51cd5fd7079d0c0fcaa49ceb954b6467ff /plat/socionext/uniphier/uniphier_bl2_setup.c | |
parent | 8e053dc5ebb5d99ef6e2605e2d57c202123717d4 (diff) | |
download | trusted-firmware-a-247fc0435191586b053f730302d28a419d3c6939.tar.gz |
uniphier: switch to BL2-AT-EL3 and remove BL1 support
UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3
support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2
is entered at EL1-S. Now, this platform is able to avoid this waste.
Enable the BL2_AT_EL3 option, and remove BL1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/socionext/uniphier/uniphier_bl2_setup.c')
-rw-r--r-- | plat/socionext/uniphier/uniphier_bl2_setup.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c index b83e70021a..daf0c45d38 100644 --- a/plat/socionext/uniphier/uniphier_bl2_setup.c +++ b/plat/socionext/uniphier/uniphier_bl2_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,13 +15,11 @@ #include "uniphier.h" -static meminfo_t uniphier_bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); static int uniphier_bl2_kick_scp; -void bl2_early_platform_setup(meminfo_t *mem_layout) +void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, + u_register_t x2, u_register_t x3) { - uniphier_bl2_tzram_layout = *mem_layout; - uniphier_console_setup(); } @@ -32,7 +30,7 @@ static const struct mmap_region uniphier_bl2_mmap[] = { { .size = 0 }, }; -void bl2_plat_arch_setup(void) +void bl2_el3_plat_arch_setup(void) { unsigned int soc; int skip_scp = 0; @@ -40,7 +38,7 @@ void bl2_plat_arch_setup(void) uniphier_mmap_setup(UNIPHIER_SEC_DRAM_BASE, UNIPHIER_SEC_DRAM_SIZE, uniphier_bl2_mmap); - enable_mmu_el1(0); + enable_mmu_el3(0); soc = uniphier_get_soc_id(); if (soc == UNIPHIER_SOC_UNKNOWN) { |