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author | Sumit Garg <sumit.garg@linaro.org> | 2018-06-15 14:43:35 +0530 |
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committer | Sumit Garg <sumit.garg@linaro.org> | 2018-06-21 11:22:42 +0530 |
commit | 007a7a33583fa7bd3ba499d0f0f44a3aaf7dfb38 (patch) | |
tree | d5789748d57b96bc053be354792ecfd56506bf24 /plat/socionext/synquacer/include | |
parent | 5e5cfc21f0c70d8ea7a1bc2e6022d3cdbd4202af (diff) | |
download | trusted-firmware-a-007a7a33583fa7bd3ba499d0f0f44a3aaf7dfb38.tar.gz |
synquacer: Implement topology functions
These functions describe the layout of the cores and clusters in order
to support the PSCI framework.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Diffstat (limited to 'plat/socionext/synquacer/include')
-rw-r--r-- | plat/socionext/synquacer/include/platform_def.h | 6 | ||||
-rw-r--r-- | plat/socionext/synquacer/include/sq_common.h | 14 |
2 files changed, 20 insertions, 0 deletions
diff --git a/plat/socionext/synquacer/include/platform_def.h b/plat/socionext/synquacer/include/platform_def.h index 7ef0f13d95..238fcbe02a 100644 --- a/plat/socionext/synquacer/include/platform_def.h +++ b/plat/socionext/synquacer/include/platform_def.h @@ -9,6 +9,12 @@ #include <common_def.h> +/* CPU topology */ +#define PLAT_MAX_CORES_PER_CLUSTER 2 +#define PLAT_CLUSTER_COUNT 12 +#define PLATFORM_CORE_COUNT (PLAT_CLUSTER_COUNT * \ + PLAT_MAX_CORES_PER_CLUSTER) + #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) diff --git a/plat/socionext/synquacer/include/sq_common.h b/plat/socionext/synquacer/include/sq_common.h new file mode 100644 index 0000000000..531e522797 --- /dev/null +++ b/plat/socionext/synquacer/include/sq_common.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __SQ_COMMON_H__ +#define __SQ_COMMON_H__ + +#include <sys/types.h> + +unsigned int sq_calc_core_pos(u_register_t mpidr); + +#endif /* __SQ_COMMON_H__ */ |