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authorKever Yang <kever.yang@rock-chips.com>2019-09-19 10:37:36 +0800
committerKever Yang <kever.yang@rock-chips.com>2019-09-20 08:42:53 +0800
commit0aad563c74807195cc7fe2208d17e2d889157f1e (patch)
tree1644bbb3955c445783592f2182cc15e0ab86f2c5 /plat/rockchip/px30
parent382ddb3dd46ada0d7439d2d95bb0de3b3abb6d9d (diff)
downloadtrusted-firmware-a-0aad563c74807195cc7fe2208d17e2d889157f1e.tar.gz
rockchip: Update BL31_BASE to 0x40000
Rockchip platform is using the first 1MB of DRAM as secure ram space, and there is a vendor loader who loads and runs the BL31/BL32/BL33, this loader is usually load by SoC BootRom to the start addres of DRAM, we need to reserve enough space for this loader so that it doesn't need to do the relocate when loading the BL31. eg. We use U-Boot SPL to load ATF BL31 and U-Boot proper as BL33, the SPL TEXT BASE is offset 0 of DRAM which is decide by Bootrom; if we update the BL31_BASE to offset 0x40000(256KB), then the 0~0x40000 should be enough for SPL and no need to do the relocate while the space size 0x10000(64KB) may not enough for SPL. After this update, the BL31 can use the rest 768KB of the first 1MB, which is also enough, and the loader who is using BL31 elf file can support this update without any change. Change-Id: I66dc685594d77f10f9a49c3be015fd6729250ece Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'plat/rockchip/px30')
-rw-r--r--plat/rockchip/px30/include/platform_def.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/rockchip/px30/include/platform_def.h b/plat/rockchip/px30/include/platform_def.h
index 8e70a7031d..9dccab82be 100644
--- a/plat/rockchip/px30/include/platform_def.h
+++ b/plat/rockchip/px30/include/platform_def.h
@@ -79,7 +79,7 @@
/*
* Put BL3-1 at the top of the Trusted RAM
*/
-#define BL31_BASE (TZRAM_BASE + 0x10000)
+#define BL31_BASE (TZRAM_BASE + 0x40000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/*******************************************************************************