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authorJulius Werner <jwerner@chromium.org>2017-08-02 16:31:04 -0700
committerJulius Werner <jwerner@chromium.org>2018-01-19 15:21:12 -0800
commit890abc33e46349fb01aed443ad7128b82ba34f3d (patch)
treead62b1a3e332357880e59d53ea070997898945e6 /plat/rockchip/common
parent3c250b9ab669614c8a2fcae27f598f384c6146fe (diff)
downloadtrusted-firmware-a-890abc33e46349fb01aed443ad7128b82ba34f3d.tar.gz
rockchip: Move to MULTI_CONSOLE_API
This patch changes all Rockchip platforms to use the new MULTI_CONSOLE_API. The platform-specific plat_crash_console implementations are removed so that the platform can use the ones from the common platform code instead. Also change the registers used in plat_crash_print_regs. The existing use of x16 and x17 has always been illegal, since those registers are reserved for use by the linker as a temporary scratch registers in intra-procedure-call veneers and can never be expected to maintain their values across a function call. Change-Id: I8249424150be8d5543ed4af93b56756795a5288f Signed-off-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'plat/rockchip/common')
-rw-r--r--plat/rockchip/common/aarch64/plat_helpers.S28
-rw-r--r--plat/rockchip/common/bl31_plat_setup.c12
-rw-r--r--plat/rockchip/common/include/plat_macros.S16
3 files changed, 16 insertions, 40 deletions
diff --git a/plat/rockchip/common/aarch64/plat_helpers.S b/plat/rockchip/common/aarch64/plat_helpers.S
index 24cb8e45af..f415f87723 100644
--- a/plat/rockchip/common/aarch64/plat_helpers.S
+++ b/plat/rockchip/common/aarch64/plat_helpers.S
@@ -19,8 +19,6 @@
.globl plat_secondary_cold_boot_setup
.globl plat_report_exception
.globl platform_is_primary_cpu
- .globl plat_crash_console_init
- .globl plat_crash_console_putc
.globl plat_my_core_pos
.globl plat_reset_handler
.globl plat_panic_handler
@@ -83,32 +81,6 @@ func platform_is_primary_cpu
endfunc platform_is_primary_cpu
/* --------------------------------------------------------------------
- * int plat_crash_console_init(void)
- * Function to initialize the crash console
- * without a C Runtime to print crash report.
- * Clobber list : x0, x1, x2
- * --------------------------------------------------------------------
- */
-func plat_crash_console_init
- mov_imm x0, PLAT_RK_UART_BASE
- mov_imm x1, PLAT_RK_UART_CLOCK
- mov_imm x2, PLAT_RK_UART_BAUDRATE
- b console_core_init
-endfunc plat_crash_console_init
-
- /* --------------------------------------------------------------------
- * int plat_crash_console_putc(void)
- * Function to print a character on the crash
- * console without a C Runtime.
- * Clobber list : x1, x2
- * --------------------------------------------------------------------
- */
-func plat_crash_console_putc
- mov_imm x1, PLAT_RK_UART_BASE
- b console_core_putc
-endfunc plat_crash_console_putc
-
- /* --------------------------------------------------------------------
* void plat_panic_handler(void)
* Call system reset function on panic. Set up an emergency stack so we
* can run C functions (it only needs to last for a few calls until we
diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
index 28a83880fc..6199edae2f 100644
--- a/plat/rockchip/common/bl31_plat_setup.c
+++ b/plat/rockchip/common/bl31_plat_setup.c
@@ -71,15 +71,19 @@ void params_early_setup(void *plat_param_from_bl2)
void bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2)
{
+ static console_16550_t console;
+
params_early_setup(plat_params_from_bl2);
#if COREBOOT
if (coreboot_serial.type)
- console_init(coreboot_serial.baseaddr,
- coreboot_serial.input_hertz, coreboot_serial.baud);
+ console_16550_register(coreboot_serial.baseaddr,
+ coreboot_serial.input_hertz,
+ coreboot_serial.baud,
+ &console);
#else
- console_init(PLAT_RK_UART_BASE, PLAT_RK_UART_CLOCK,
- PLAT_RK_UART_BAUDRATE);
+ console_16550_register(PLAT_RK_UART_BASE, PLAT_RK_UART_CLOCK,
+ PLAT_RK_UART_BAUDRATE, &console);
#endif
VERBOSE("bl31_setup\n");
diff --git a/plat/rockchip/common/include/plat_macros.S b/plat/rockchip/common/include/plat_macros.S
index be1a9fa5dc..6b3cb6a72d 100644
--- a/plat/rockchip/common/include/plat_macros.S
+++ b/plat/rockchip/common/include/plat_macros.S
@@ -38,14 +38,14 @@ cci_iface_regs:
* The below utility macro prints out relevant GIC
* and CCI registers whenever an unhandled
* exception is taken in BL31.
- * Expects: GICD base in x16, GICC base in x17
+ * Expects: GICD base in x26, GICC base in x27
* Clobbers: x0 - x10, sp
* ---------------------------------------------
*/
.macro plat_crash_print_regs
- mov_imm x16, PLAT_RK_GICD_BASE
- mov_imm x17, PLAT_RK_GICC_BASE
+ mov_imm x26, PLAT_RK_GICD_BASE
+ mov_imm x27, PLAT_RK_GICC_BASE
/* Check for GICv3 system register access */
mrs x7, id_aa64pfr0_el1
@@ -72,19 +72,19 @@ print_gicv2:
/* Load the gicc reg list to x6 */
adr x6, gicc_regs
/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
- ldr w8, [x17, #GICC_HPPIR]
- ldr w9, [x17, #GICC_AHPPIR]
- ldr w10, [x17, #GICC_CTLR]
+ ldr w8, [x27, #GICC_HPPIR]
+ ldr w9, [x27, #GICC_AHPPIR]
+ ldr w10, [x27, #GICC_CTLR]
/* Store to the crash buf and print to console */
bl str_in_crash_buf_print
print_gic_common:
/* Print the GICD_ISPENDR regs */
- add x7, x16, #GICD_ISPENDR
+ add x7, x26, #GICD_ISPENDR
adr x4, gicd_pend_reg
bl asm_print_str
gicd_ispendr_loop:
- sub x4, x7, x16
+ sub x4, x7, x26
cmp x4, #0x280
b.eq exit_print_gic_regs
bl asm_print_hex